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MB91F192 Datasheet(PDF) 13 Page - fujitsu semiconductor |
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MB91F192 Datasheet(HTML) 13 Page - fujitsu semiconductor |
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13 / 33 page ![]() MB 91191/192 Series 13 (Bus names) • I bus : 16-bit bus for internal instructions. As the FR family of CPUs use the Harvard architecture, instructions and data use separate buses. A bus converter is connected to the I bus. • D bus : Internal 32-bit data bus. The internal peripherals are connected to the D bus. • C bus : Internal multiplexed bus. Connected to the I and D buses via a switch. An external interface module is connected to the C bus. Data and instructions are multiplexed on the external data bus. • R bus : Internal 16-bit data bus. The R bus connects to the D bus via an adapter. The I/O, clock oscillator, and interrupt controller are connected to the R bus. As the R bus is only 16 bits wide, address and data are multiplexed on the bus and therefore multiple cycles are required when the CPU accesses these resources. |
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