MB

91191/192 Series

21

(2) Multiplex Bus Read/Write Operation

× number of wait cycles) to this value.

*2 : This value is for gear setting

= ×1

For the value for gear settings 1/2, 1/4, and 1/8, substitute 1/2, 1/4, and 1/8 respectively for n in the formula below.

Parameter

Symbol

Pin Name

Condi-

tion

Value

Unit

Re-

marks

Min

Typ

Max

ALE pulse width

ALE



− 10



ns

Address delay time

D31 to D16



− 15

+ 15

ns

*2

Address clear time



+ 10

ns

*2

Data delay time

D31 to D16





+ 26

ns

*2

RD delay time

RD



− 11

+ 11

ns

RD pulse width



− 11

+ 11

ns

*1

WR0, WR1 delay time

WR0, WR1



− 11

+ 11

ns

WR0, WR1 pulse width



− 11

+ 11

ns

*1

Data setup

→ RD ↑ time

D31 to D16



15



ns

RD

↑→ Data hold time



0



ns

Internal

clock

ALE

Read time

D31 to D16

MPX bus

RD

Write time

D31 to D16

MPX bus

WR0 , WR1

A15 to A08

When not

multiplexed