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STEF512GR Datasheet(PDF) 6 Page - STMicroelectronics |
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STEF512GR Datasheet(HTML) 6 Page - STMicroelectronics |
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6 / 22 page ![]() 5 Electrical characteristics TJ = 25°C, VIN_5 = 5 V, VIN_12 = 12 V, VEN = 0 V, CIN = 10 µF, COUT = 10 µF; unless otherwise specified. Table 4. Electrical characteristics Symbol Parameter Test conditions Min. Typ. Max. Unit 5 V e-fuse VClamp_5 Output clamping voltage VIN_5 = 8 V 5.5 5.7 5.9 V VUVLO_5 Undervoltage lockout Turn-on, voltage rising 4.25 4.35 4.45 V VHyst_5 UVLO hysteresis Turn-off, voltage falling 1.78 V RDSon_5 On-resistance TJ = 25°C (1) 36 mΩ TJ = 125°C 50 IL_5 Off-state leakage current VEN = 5 V, VOUT_5 = GND 1 5 µA ID5 Maximum continuous current (2) (3) TA = 25°C 2.5 A IShort_5 Short-circuit current limit 0.6 1 1.4 A ILim_5 Overload current limit 2.7 3 3.3 A dV/dt_5 Output voltage ramp time From 10% to 90% of VOUT, Cdv/dt = 100 nF 11 13 15 ms 12 V e-fuse VClamp_12 Output clamping voltage VIN_12 = 17 V 14.5 15 15.5 V VUVLO_12 Undervoltage lockout Turn-on, voltage rising 9.4 9.7 10 V VHyst_12 UVLO hysteresis (12 V rail) Turn-off, voltage falling 2 V RDSon_12 On-resistance (12 V rail) TJ = 25°C (1) 40 mΩ TJ = 125°C 70 IL_12 Off-state leakage current VEN = 5 V, VOUT_12 = GND 1 5 µA ID12 Continuous current (2) (3) TA = 25°C 3.5 A IShort_12 Short-circuit current limit 1.8 A ILim_12 Overload current limit 3.6 4 4.5 A dV/dt_12 Output voltage ramp time From 10% to 90% of VOUT, Cdv/dt = 100 nF 10 12 14 ms Common features: SAS disable pin, quiescent current VIL EN pin low-level input voltage Output enabled 0.7 V VIH EN pin high-level input voltage Output disabled 2.1 V RP EN pin internal pull- down resistor 1 MΩ STEF512GR Electrical characteristics DS13212 - Rev 2 page 6/22 |
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