RT8152C datasheet(21/24 Pages) RICHTEK

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RT8152C/D

DS8152C/D-04

April 2011

www.richtek.com

Figure 12. Thermal Throttling Setting Principle

NTC

VCC

NTC

RTT

0.8 x VCC

VRTT

CMP

For example, the following design parameters are given :

DCR = 1m

Ω, VCC = 5V, IL,ripple = 9A

ROC1a = RNTC, 25 = 10k

Ω, βNTC = 3450

For

−20°C to 100°C operation range, to set OCP trip current

ITRIP = 28A

LIM

OCSET, 25

28A

32.5A

40 33A 1m

1.297V

=×

Ω =

RNTC, −20°C = 78.4kΩ, RNTC,100°C = 0.98kΩ

RSENSE,-20°C = 0.82mΩ, RSENSE,100°C = 1.29mΩ

ROC2 = 4.7k

Ω, ROC1b = 8.46 kΩ

Over Voltage Protection (OVP)

The OVP circuit is triggered under two conditions :

Condition 1 : When VVSEN exceeds 1.52V.

Condition 2 : When VVSEN exceeds VDAC by 300mV

(typ.).

If either condition is valid, the RT8152C/D latches the

LGATE = 1 and UGATE = 0 as crowbar to the output

voltage of VR. Turn on all LS_FETs can lead to very large

reverse inductor current and potentially result in negative

output voltage of VR. To prevent the CPU from damaging

by negative voltage. The RT8152C/D turns off all LS_FETs

when VVSEN falls below

−100mV.

Under Voltage Protection (UVP)

If VVSEN is lower than VDAC by 400mV (typ.) a UVP fault

will be tripped. Once UVP is tripped, both high side and

low side MOSFET will be turned off, and the internal

discharge resistor at VSEN pin will be enabled. UVP is a

latched protection, it can only be reset by cycling VRON

or VCC.

Negative Voltage Protection (NVP)

During the state that VVSEN is lower than

−100mV, the

controller will force LGATE = 0 and UGATE = 0 for

preventing negative voltage. Once VVSEN recovers to be

higher than 0V, NVP will be suspended and LGATE = 1

will be enabled again.

⇒

Over Temperature Protection (OTP)

Over Temperature Protection prevents the VR from

damaging. OTP is considered to be the final protection

stage against overheating of the VR. The thermal throttling

VRTT shall be set to be asserted prior to OTP to manage

the VR power. When this measure was insufficient to keep

the die temperature of the controller below the OTP

threshold, OTP will be asserted and latches. The die

temperature of the controller is monitored internally by a

temperature sensor. As a result of OTP triggering, a soft

shutdown will be launched and VVSEN will be monitored.

When VVSEN is less than 200mV, the driver remains in

high impedance state and the discharging resistor at VSEN

pin will be enabled. A reset can be executed by cycling

VCC or VRON.

Thermal Throttling Control

Intel IMVP-6.5 technology supports thermal throttling of

the processor to prevent catastrophic thermal damage.

The RT8152C/D includes a thermal monitoring circuit to

detect an exceeded user defined temperature on a VR

point. The thermal monitoring circuit senses the voltage

change across NTC pin. Figure 12 shows the principle of

setting the temperature threshold. Connect an external

resistor divider between Vcc and GND. This divider uses

a Negative Temperature Coefficient (NTC) thermistor and

a resistor. The joint of the resistor divider is connected to

the NTC pin in order to generate a voltage that is inversely

proportional to temperature. The RT8152C/D pulls VRTT

low if the voltage on the NTC pin is greater than 0.8 x VCC.

The internal VRTT comparator has a hysteresis of 200mV

(typ.) to prevent high frequency VRTT oscillation when

the temperature is near the setting point. The minimum

assertion/de-assertion time for VRTT toggling is 1.6ms

(typ.).

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