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TMS320VC5503 Datasheet(PDF) 30 Page - Texas Instruments

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Part # TMS320VC5503
Description  TMS320VC5503 Fixed-Point Digital Signal Processor
PDF  128 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

TMS320VC5503 Datasheet(HTML) 30 Page - Texas Instruments

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Functional Overview
30
April 2004 − Revised January 2008
SPRS245J
3.1.3.2
GHH and ZHH Package(s) Memory Map
The GHH and ZHH packages feature 21 address bits representing 2M-byte linear address for asynchronous
memories per CE space. Due to address row/column multiplexing, address reach for SDRAM devices is 4M
bytes for each CE space. The largest SDRAM device that can be used with the 5503 in a GHH and ZHH
package is 128M-bit SDRAM.
000000
DARAM / HPI Access
(32K − 192) Bytes
008000
DARAM‡
32K Bytes
010000
External§ − CE0
040000
400000
800000
C00000
FF0000
64K Bytes
FFFFFF
External§ − CE1
External§ − CE2
External§ − CE3
Block Size
Byte Address
(Hex)†
(if MPNMC=0)
ROM#
(if MPNMC=1)
External§ − CE3
2M Bytes − Asynchronous
4M Bytes − SDRAM (MPNMC = 1)
4M Bytes − 64K Bytes if internal ROM selected (MPNMC = 0)
2M Bytes − Asynchronous
4M Bytes − SDRAM
2M Bytes − Asynchronous
4M Bytes − SDRAM
2M Bytes − Asynchronous
4M Bytes − 64K Bytes SDRAM
Memory Blocks
† Address shown represents the first byte address in each block.
‡ Dual-access RAM (DARAM): two accesses per cycle per block, 8 blocks of 8K bytes.
§ External memory spaces are selected by the chip-enable signal shown (CE[0:3]). Supported memory types include: asynchronous static
RAM (SRAM) and synchronous DRAM (SDRAM).
¶ The minus 64K bytes consists of 32K-byte DARAM/HPI access and 32K-byte DARAM.
# Read-only memory (ROM): one access every two cycles.
0000C0
MMR (Reserved)
Reserved
Figure 3−3. TMS320VC5503 Memory Map (GHH and ZHH Packages)



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