SAMD21J datasheet(32/59 Pages) MICROCHIP

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Figure 7-2. APB Read Access.

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

Addr 1

Data 1

PADDR

PWRITE

PCLK

PSEL

PENABLE

PRDATA

PREADY

Wait states

No wait states

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Product Mapping

7.6

PAC - Peripheral Access Controller

7.6.1

Overview

There is one PAC associated with each AHB-APB bridge. The PAC can provide write protection for

registers of each peripheral connected on the same bridge.

The PAC peripheral bus clock (CLK_PACx_APB) can be enabled and disabled in the Power Manager.

CLK_PAC0_APB and CLK_PAC1_APB are enabled are reset. CLK_PAC2_APB is disabled at reset.

Refer to PM – Power Manager for details. The PAC will continue to operate in any sleep mode where the

selected clock source is running. Write-protection does not apply for debugger access. When the

debugger makes an access to a peripheral, write-protection is ignored so that the debugger can update

the register.

Write-protect registers allow the user to disable a selected peripheral’s write-protection without doing a

read-modify-write operation. These registers are mapped into two I/O memory locations, one for clearing

and one for setting the register bits. Writing a one to a bit in the Write Protect Clear register (WPCLR) will

clear the corresponding bit in both registers (WPCLR and WPSET) and disable the write-protection for

the corresponding peripheral, while writing a one to a bit in the Write Protect Set (WPSET) register will set

the corresponding bit in both registers (WPCLR and WPSET) and enable the write-protection for the

corresponding peripheral. Both registers (WPCLR and WPSET) will return the same value when read.

If a peripheral is write-protected, and if a write access is performed, data will not be written, and the

peripheral will return an access error (CPU exception).

The PAC also offers a safety feature for correct program execution, with a CPU exception generated on

double write-protection or double unprotection of a peripheral. If a peripheral n is write-protected and a

write to one in WPSET[n] is detected, the PAC returns an error. This can be used to ensure that the

application follows the intended program flow by always following a write-protect with an unprotect, and

vice versa. However, in applications where a write-protected peripheral is used in several contexts, e.g.,

interrupts, care should be taken so that either the interrupt can not happen while the main application or

other interrupt levels manipulate the write-protection status, or when the interrupt handler needs to

unprotect the peripheral, based on the current protection status, by reading WPSET.

32-bit ARM-Based Microcontrollers

Datasheet Summary

40001884A-page 32

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