SAMV71Q21 datasheet(20/41 Pages) MICROCHIP

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10.

Controller Area Network (MCAN)

10.1

Non-ISO Operation

The default frame format on Revision A silicon does not match the default format specified in the current

device data sheet.

Workaround

To retain Revision A behavior, set the MCAN_CCCR.NISO bit to '1'.

Affected Silicon Revisions

10.2

MCAN_CCCR Register

In Revision A silicon, the MCAN CC Control register content does not match the content of the current

device data sheet.

•

NISO bit is missing

•

EFBI bit is named FDBS

•

PXHD bit is named FDO

•

BRSE bit and FDOE bit are named CME[1:0]

•

CMR[1:0] bits are present

Workaround

None.

Affected Silicon Revisions

10.3

Transmitter Delay Compensation Value (TDCV) Bits

In Revision A silicon, the Transmitter Delay Compensation Value (TDCV) bit field does not match the

content in the current device data sheet.

In Revision A silicon, the TDCV bits are located in the MCAN_TEST register.

In the current device data sheet, the TDCV bits are located in the MCAN_PSR register.

Workaround

None.

SAM E70/S70/V70/V71 Family

Controller Area Network (MCAN)

Datasheet Errata

DS80000767C-page 20

SAMV71Q21 Datasheet(PDF) 20 Page - Microchip Technology