WM8742GEDSSLASHV datasheet(19/66 Pages) CIRRUS

19 / 66 page

WM8742

Rev 4.4

SOFTWARE CONTROL INTERFACE

The software control interface may be operated using a 2-wire or 3-wire (SPI-compatible) serial

interface. When operating under serial control, hardware configuration pins are ignored.

Note: DIFFHW will override all other pins, forcing the device into hardware control mode and

differential mono mode.

3-WIRE (SPI COMPATIBLE) SERIAL CONTROL MODE

Every rising edge of SCLK clocks in one bit of data on SDIN.

A rising edge on CSB latches a

complete control word consisting of 16 bits. The 3-wire interface protocol is shown in Figure 9.

Figure 9 3-wire Serial Interface Protocol

Notes:

A[6:0] are Control Address Bits

D[7:0] are Control Data Bits

D[8] is always set to zero

3-WIRE CONTROL INTERFACE DAISY CHAINING

In daisy chaining mode, SDOUT (pin 25) outputs control data sampled on SDIN with a delay of 16

SCLK cycles. This data signal can be used to control another WM8742 in a daisy chain circuit as

shown in Figure 10.

DAC #1

DAC #3

DAC #2

Figure 10 Control Interface Daisy Chaining Setup

To configure devices into daisy chain mode the CSB signal should be driven low while there is a

daisy chain mode. CSB should then be driven low again while register bit SDOUT is set high. Setting

CSB high again will cause the first register write to be output to the second device from the SDOUT

pin, this sets the second device into daisy chain mode. This method must be repeated for the number

WM8742GEDS/V Datasheet(PDF) 19 Page - Cirrus Logic