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SN74LVC2T45 Datasheet(PDF) 4 Page - Texas Instruments

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Part # SN74LVC2T45
Description  Dual-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation
PDF  32 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

SN74LVC2T45 Datasheet(HTML) 4 Page - Texas Instruments

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SN74LVC2T45
SCES516K – DECEMBER 2003 – REVISED JUNE 2017
www.ti.com
Product Folder Links: SN74LVC2T45
Submit Documentation Feedback
Copyright © 2003–2017, Texas Instruments Incorporated
(1)
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3)
The value of VCC is provided in the recommended operating conditions table.
6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
UNIT
VCCA
Supply voltage
–0.5
6.5
V
VCCB
VI
Input voltage(2)
–0.5
6.5
V
VO
Voltage range applied to any output in the high-impedance or power-off state (2)
–0.5
6.5
V
VO
Voltage range applied to any output in the high or
low state(2) (3)
A port
–0.5
VCCA + 0.5
V
B port
–0.5
VCCB + 0.5
IIK
Input clamp current
VI < 0
–50
mA
IOK
Output clamp current
VO < 0
–50
mA
IO
Continuous output current
±50
mA
Continuous current through VCC or GND
±100
mA
TJ
Junction temperature
150
°C
Tstg
Storage temperature
–65
150
°C
(1)
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.2 ESD Ratings
VALUE
UNIT
V(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
±4000
V
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
±1000
Machine model (A115-A)
±200
(1)
VCCI is the VCC associated with the input port.
(2)
VCCO is the VCC associated with the output port.
(3)
All unused data inputs of the device must be held at VCCI or GND to ensure proper device operation. See Implications of Slow or
Floating CMOS Inputs, SCBA004.
(4)
For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
(1) (2) (3)
VCCI
VCCO
MIN
MAX
UNIT
VCCA
Supply voltage
1.65
5.5
V
VCCB
1.65
5.5
VIH
High-level
input voltage
Data inputs(4)
1.65 V to 1.95 V
VCCI × 0.65
V
2.3 V to 2.7 V
1.7
3 V to 3.6 V
2
4.5 V to 5.5 V
VCCI × 0.7
VIL
Low-level
input voltage
Data inputs(4)
1.65 V to 1.95 V
VCCI × 0.35
V
2.3 V to 2.7 V
0.7
3 V to 3.6 V
0.8
4.5 V to 5.5 V
VCCI × 0.3



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