November 2003

ASM3P2531A

rev 1.0

Low Frequency EMI Reduction

3 of 8

Notice: The information in this document is subject to change without notice.

Schematic for a Typical Application

1

VDD

2

3

4

5

6

7

8

Ferrite

Bead

0

Ω

0

Ω

CLKIN

VDD

VSS

ModOUT

STOP

NC

NC

NC

EMI reduced clock output

35MHz – 55MHz

ASM3P3531A

VDD

Input clock 35MHz – 55MHz

Use either pull-up or pull-

down resistors with 0Ω

0.1µF