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MSP430F6435IPZR Datasheet(PDF) 68 Page - Texas Instruments |
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MSP430F6435IPZR Datasheet(HTML) 68 Page - Texas Instruments |
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68 / 128 page ![]() 9.12.9 DMA Controller The DMA controller allows movement of data from one memory address to another without CPU intervention. For example, the DMA controller can be used to move data from the ADC12_A conversion memory to RAM. Using the DMA controller can increase the throughput of peripheral modules. The DMA controller reduces system power consumption by allowing the CPU to remain in sleep mode, without having to awaken to move data to or from a peripheral. Table 9-11 lists the trigger assignments for each DMA channel. Table 9-11. DMA Trigger Assignments TRIGGE R(1) CHANNEL 0 1 2 3 4 5 0 DMAREQ 1 TA0CCR0 CCIFG 2 TA0CCR2 CCIFG 3 TA1CCR0 CCIFG 4 TA1CCR2 CCIFG 5 TA2CCR0 CCIFG 6 TA2CCR2 CCIFG 7 TBCCR0 CCIFG 8 TBCCR2 CCIFG 9 Reserved 10 Reserved 11 Reserved 12 Reserved 13 Reserved 14 Reserved 15 Reserved 16 UCA0RXIFG 17 UCA0TXIFG 18 UCB0RXIFG 19 UCB0TXIFG 20 UCA1RXIFG 21 UCA1TXIFG 22 UCB1RXIFG 23 UCB1TXIFG 24 ADC12IFGx 25 DAC12_0IFG(2) 26 DAC12_1IFG(2) 27 Reserved 28 Reserved 29 MPY ready 30 DMA5IFG DMA0IFG DMA1IFG DMA2IFG DMA3IFG DMA4IFG 31 DMAE0 (1) Reserved DMA triggers may be used by other devices in the family. Reserved DMA triggers will not cause any DMA trigger event when selected. (2) Only on devices with peripheral module DAC12_A. Reserved on devices without DAC. 9.12.10 Universal Serial Communication Interface (USCI) The USCI modules are used for serial data communication. The USCI module supports synchronous communication protocols such as SPI (3 or 4 pin) and I2C, and asynchronous communication protocols such as MSP430F6438, MSP430F6436, MSP430F6435, MSP430F6433 SLAS720F – AUGUST 2010 – REVISED SEPTEMBER 2020 www.ti.com 68 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: MSP430F6438 MSP430F6436 MSP430F6435 MSP430F6433 |
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