NCP5331 datasheet(32/38 Pages) ONSEMI

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NCP5331

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2. Output Inductor Selection

Calculate the minimum output inductance at IO,MAX

according to Equation 3 with

±20% inductor ripple current

(

α = 0.15).

LoMIN

(VIN * VOUT) @ VOUT

(

a @ IO,MAX @ VIN @ fSW)

(12 V

* 1.163 V) @ 1.163 V

(0.15

@ 52 A @ 12 V @ 200 kHz)

+ 673 nH

(3)

To minimize core losses, we choose the T50

−8B/90 core

from Micrometals: 23.0 nH/N2, 2.50 cm/turn. According to

the Micrometals catalog, at 26 A (per phase) the

permeability of this core will be approximately 88% of the

permeability at 0 A. Therefore, at 0 A we must achieve at

least 673 nH/0.88 or 765 nH. Using 6 turns of #16 AWG

bifilar (2 m

Ω/ft) will produce 828 nH.

We will need the nominal and worst case inductor

resistances for subsequent calculations.

RL + 6 turns @ 2.5 cm turn @ 0.03218 ft cm @ 2mW ft

+ 0.965 mW

The inductor resistance will be maximized when the

inductor is “hot” due to the load current and the ambient

temperature is high. Assuming a 50

°C temperature rise of

the inductor at full-load and a 35

°C ambient temperature

rise we can calculate

RL,MAX + 0.965 mW @ [1 ) 0.39% °C @ (50°C ) 35°C)]

+ 1.28 mW

The output inductance at full-load will be reduced due to

the saturation characteristic of the core material.

Lo52 A + 0.88

828 nH

+ 729 nH at full load

Next, use Equation 4 to insure the output voltage ripple

will satisfy the design goal with the minimum number of

output capacitors and the full load output inductance.

@ (1.163 V 12 V) (729 nH @ 200 kHz)}

(4)

+ (19 mW 6) @ {(12 V * 2 @ 1.163 V)

+ 20 mV

VOUT,P- P + (ESR per cap NOUT,MIN)

@ {(VIN * #Phases @ VCORE) @ D (Lo52 A @ fSW)}

So, the ripple requirement will be satisfied if the minimum

number of output capacitors is used. More output capacitors

will probably be required to satisfy the transient

requirement, which will result in a lower ripple voltage.

3. Input Capacitor Selection

Use Equation 5 to determine the average input current to

the converter at full-load.

IIN,AVG + IO,MAX @ D h

+ 52 A @ (1.163 V 12 V) 0.80 + 6.30 A

(5)

Next, use Equation 6 to Equation 10 with the full-load

inductance value of 729 nH.

DILo + (VIN * VOUT) @ D (Lo @ fSW)

+ (12 V * 1.163 V) @

(1.163 V 12 V)

(729 nH

@ 200 kHz)

+ 7.20 App

(10)

ILo,MAX + IO,MAX 2 ) DILo 2

+ 52 A 2 ) 7.20 App 2 + 29.6 A

(8)

ILo,MIN + IO,MAX 2 * DILo 2

+ 52 A 2 * 7.20 App 2 + 22.4 A

(9)

IC,MAX + ILo,MAX h * IIN,AVG

+ 29.6 A 0.80 * 6.30 A + 30.7 A

(6)

IC,MIN + ILo,MIN h * IIN,AVG

+ 22.4 A 0.80 * 6.30 A + 21.7 A

(7)

For the two-phase converter, the input capacitor(s) rms

current at full-load is as follows. (Note: D = 1.163 V/12 V

= 0.097.)

ICIN,RMS + [2D @ (IC,MIN2 ) IC,MIN @ DIC,IN

(11)

) DIC,IN2 3) ) IIN,AVG2 @ (1 * 2D)]1 2

+ [0.19 @ (21.72 ) 21.7 @ 9.0 ) 9.02 3)

) 6.302 @ (1 * 0.19)]1 2

+ 12.9 ARMS

At this point, the designer must decide between saving

board space by using higher- rated/more costly capacitors

or saving cost by using more lower-rated/less costly

capacitors. To save cost, we choose the MBZ series

capacitors by Rubycon. Part number 16MBZ1500M10X20:

1500

µF, 16 V, 2.55 ARMS, 13 mΩ, 10 × 20 mm. This design

will require NIN = 12.8 A/2.55 A = 5 capacitors on the input

for a cost sensitive design or 6 capacitors for a conservative

design.

4. Input Inductor Selection

For the Claw Hammper CPU, the input inductor must

limit the input current slew rate to less than 0.5 A/

µs during

a load transient from 0 to 52 A. A conservative value will be

calculated assuming the minimum number of output

capacitors (NOUT = 6), five input capacitors (NIN = 5), worst

case ESR values for both the input and output capacitors,

and a maximum duty cycle at the maximum DAC setting

with 25 mV of no-load AVP.

DMAX + (1.550 V ) 25 mVAVP) 10.8 VIN + 0.146

NCP5331 Datasheet(PDF) 32 Page - ON Semiconductor

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