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MAS3506D Datasheet(PDF) 32 Page - Micronas |
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MAS3506D Datasheet(HTML) 32 Page - Micronas |
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32 / 52 page ![]() MAS 3506D PRELIMINARY DATA SHEET 32 Micronas 29 22 XVSS Supply X Ground of output buffers 30 21 SID/PI7 I X Serial input data 31 20 SII/PI6 I VSS Serial input frame identification 32 19 SIC/PI5 I X Serial input clock 33 18 PI4 O LV MPEG-frame sync 34 17 PI3 I VSS AUD-SW, information from head- phone jack 35 16 PI2 I VSS Reserved 36 15 PI1 I VSS Reserved 37 14 PI0 I VSS Reserved 38 13 CLKO O LV Clock output (nominal 24.576 MHz) 39 12 PUP O LV Power Up, i.e. status of voltage super- vision 40 11 WSEN I X Enable DSP and DC/DC converter 41 10 WRDY O LV If WSEN=0: Valid clock input at CLKI If WSEN=1: Clock synthesizer PLL locked 42 9 AVDD Supply VDD Supply for analog circuits 43 8 CLKI I X Clock input 44 7 AVSS Supply VSS Ground supply for analog circuits Pin No. Pin Name Type Connection Short Description PMQFP 44-pin PLCC 44-pin (If not used) |
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