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STM32WL55JC Datasheet(PDF) 11 Page - STMicroelectronics |
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STM32WL55JC Datasheet(HTML) 11 Page - STMicroelectronics |
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11 / 145 page ![]() DS13293 Rev 1 11/145 STM32WL55/54xx Introduction 14 1 Introduction This document provides information on the STM32WL55/54xx microcontrollers. For information on the Arm®(a) Cortex®-M4 and Cortex®-M0+ cores, refer respectively to the Cortex®-M4 Technical Reference Manual and to the Cortex®-M0+ Technical Reference Manual available from the www.arm.com website. For information on LoRa® modulation, refer to the Semtech website (https://www.semtech.com/technology/lora). 2 Description The STM32WL55/54xx long-range wireless and ultra-low-power devices embed a powerful and ultra-low-power LPWAN-compliant radio solution, enabling the following modulations: LoRa®, (G)FSK, (G)MSK, and BPSK. The LoRa® modulation is available in STM32WLx5xx only. These devices are designed to be extremely low-power and are based on the high-performance Arm® Cortex®-M4 32-bit RISC core operating at a frequency of up to 48 MHz. This core implements a full set of DSP instructions. It is complemented by an Arm® Cortex®-M0+ microcontroller. Both cores implement an independent memory protection unit (MPU) that enhances the application security. The devices embed high-speed memories (256-Kbyte Flash memory, 64-Kbyte SRAM), and an extensive range of enhanced I/Os and peripherals. The devices also embed several protection mechanisms for embedded Flash memory and SRAM: readout protection, write protection and proprietary code readout protection. In addition, the STM32WL55/54xx devices support the following secure services running on Arm® Cortex-M0+: unique boot entry capable, secure sub-GHz MAC layer, secure firmware update, secure firmware install and storage and management of secure keys. These devices offer a 12-bit ADC, a 12-bit DAC low-power sample-and-hold, two ultra-low-power comparators associated with a high-accuracy reference voltage generator. The devices embed a low-power RTC with a 32-bit sub-second wakeup counter, one 16-bit single-channel timer, two 16-bit four-channel timers (supporting motor control), one 32-bit four-channel timer and three 16-bit ultra-low-power timers. a. Arm is a registered trademark of Arm Limited (or its subsidiaries) in the US and/or elsewhere. |
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