Preliminary Factsheet 00.100

January 2020

These specifications are subject to change without notice.

01/10/2020

© 2020 Greenliant

2

S71491-01

GLS FS0019 Rev. 00

GLS89SA032G2 / 064G2 / 128G2

Industrial Temp SATA 2.5” ArmourDrive™ MX Series

1.0

GENERAL DESCRIPTION

Each 2.5” ArmourDrive contains a NANDrive multi-chip package, which integrates a SATA NAND flash controller

with discrete NAND flash die, in a standard 2.5-inch form factor housing. Refer to Figure 2-1 for the 2.5”

ArmourDrive block diagram.

1.1

Optimized 2.5” ArmourDrive

The heart of 2.5” ArmourDrive is the SATA NAND

flash controller, which translates standard SATA

signals into flash media data and control signals. The

following components contribute to 2.5” ArmourDrive’s

operation.

1.1.1

Microcontroller Unit (MCU)

The MCU translates SATA commands into data and

control signals required for flash media operation.

1.1.2

Internal Direct Memory Access (DMA)

2.5” ArmourDrive uses internal DMA allowing instant

data transfer from/to buffer to/from flash media. This

implementation eliminates microcontroller overhead

associated

with

the

traditional,

firmware-based

approach, thereby increasing the data transfer rate.

1.1.3

Power Management Unit (PMU)

The PMU controls the power consumption of 2.5”

ArmourDrive. The PMU dramatically reduces the

power consumption of 2.5” ArmourDrive by putting the

part of the circuitry that is not in operation into sleep

mode.

The Flash File System handles inadvertent power

interrupts and has auto-recovery capability to ensure

2.5” ArmourDrive firmware integrity. For regular power

management,

the

host

must

send

an

IDLE_IMMEDIATE command and wait for command

ready before powering down 2.5” ArmourDrive.

1.1.4

Embedded Flash File System

The embedded flash file system is an integral part of

2.5” ArmourDrive. It contains MCU firmware that

performs the following tasks:

1.

Translates host side signals into flash media

writes and reads

2.

Provides flash media wear leveling to spread

the flash writes across all memory address

space to increase the longevity of flash media

3.

Keeps track of data file structures

1.1.5

Error Correction Code (ECC)

The ECC technology uses advanced algorithms to

detect and correct errors, ensuring data integrity and

extending the SSD lifespan.

1.1.6

Multi-tasking Interface

The multi-tasking interface enables fast, sequential

write performance by allowing concurrent Read,

Program and Erase operations to multiple flash media.

1.2

Advanced NAND Management

2.5” ArmourDrive’s controller uses advanced wear-

leveling

algorithms

to

substantially increase

the

longevity of NAND flash media. Wear caused by data

writes is evenly distributed in all or select blocks in the

device that prevents “hot spots” in locations that are

programmed and erased extensively. This effective

wear-leveling technique results in optimized device

endurance, enhanced data retention and higher

reliability required by long-life applications.