LTC7802EUFDM datasheet(27/34 Pages) AD

27 / 34 page

LTC7802

Rev. 0

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filter time constant should be RC = ESL/RSENSE =

0.2nH/2mΩ = 100ns, which may be implemented with

100Ω resistor in series with the SENSE+ pin and 1nF

capacitor between SENSE+ and SENSE–.

5. Select the feedback resistors. If very light load effi-

ciency is required, high value feedback resistors may

be used to minimize the current due to the feedback

divider. However, in most applications a feedback

divider current in the range of 10μA to 100μA or more

is acceptable. For a 50μA feedback divider current,

RA = 0.8V/50μA = 16kΩ. RB can then be calculated as

RB = RA(3.3V/0.8V – 1) = 50kΩ.

6. Select the MOSFETs. The best way to evaluate MOSFET

performance in a particular application is to build and

test the circuit on the bench, facilitated by an LTC7802

demo board. However, an educated guess about the

application is helpful to initially select MOSFETs. Since

this is a high current, low voltage application, I2R

losses will likely dominate over transition losses for the

top MOSFET. Therefore, choose a MOSFET with lower

RDS(ON) as opposed to lower gate charge to minimize

the combined loss terms. The bottom MOSFET does

not experience transition losses, and its power loss is

generally dominated by I2R losses. For this reason,

the bottom MOSFET is typically chosen to be of lower

RDS(ON) and subsequently higher gate charge than the

top MOSFET.

Due to the high current in this application, two MOSFETs

may needed in parallel to more evenly balance the dis-

sipated power and to lower the RDS(ON). Be sure to

select logic-level threshold MOSFETs, since the gate

drive voltage is limited to 5.1V (INTVCC). Minimize the

inductance of the TG and BG gate drive traces and their

respective return paths to the controller IC (SW and

GND) by using wide traces and multiple parallel vias.

7. Select the input and output capacitors. CIN is chosen

for an RMS current rating of at least 10A (IOUT/2, with

margin) at temperature assuming only this channel

is on. COUT is chosen with an ESR of 3mΩ for low

output ripple. Multiple capacitors connected in parallel

may be required to reduce the ESR to this level. The

output ripple in continuous mode will be highest at the

maximum input voltage. The output voltage ripple due

to ESR is approximately:

VORIPPLE = ESR • ΔIL = 3mΩ • 6A = 18mVP-P

On the 3.3V output, this is equal to 0.55% of peak to

peak voltage ripple.

8. Determine the bias supply components. Since the reg-

ulated output is not greater than the EXTVCC switcho-

ver threshold (4.7V), it cannot be used to bias INTVCC.

However, if another supply is available, for example

if the other channel is regulating to 5V, connect that

supply to EXTVCC to improve the efficiency.

For a 6.5ms soft-start, select a 0.1μF capacitor for the

TRACK/SS pin. As a first pass estimate for the bias

components, select CINTVCC = 4.7μF, boost supply

capacitor CB = 0.1μF and low forward drop boost sup-

ply diode CMDSH-4E from Central Semiconductor.

9. Determine and set application-specific parameters.

Set the MODE pin based on the trade-off of light load

efficiency and constant frequency operation. Set the

PLLIN/SPREAD pin based on whether a fixed, spread

spectrum, or phase-locked frequency is desired. The

RUN pin can be used to control the minimum input

voltage for regulator operation or can be tied to VIN

for always-on operation. Use ITH compensation com-

ponents from the typical applications as a first guess,

check the transient response for stability, and modify

as necessary.

PC Board Layout Checklist

When laying out the printed circuit board, the following

checklist should be used to ensure proper operation of

the IC. Figure 8 illustrates the current waveforms present

in the various branches of the synchronous regulators

operating in the continuous mode. Check the following

in your layout:

1. Are the top N-channel MOSFETs located within 1cm of

each other with a common drain connection at CIN?

Decoupling capacitors for the two channels they should

be close to each other to avoid a large resonant loop.

APPLICATIONS INFORMATION

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