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INA821 Datasheet(PDF) 32 Page - Texas Instruments |
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INA821 Datasheet(HTML) 32 Page - Texas Instruments |
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32 / 45 page ![]() 10.2 Layout Example C1 Place bypass capacitors as close to IC as possible 1 REF 1 REF 8 NC 8 NC 2 ±IN 2 ±IN 7 V+ 7 V+ 3 +IN 3 +IN 6 OUT 6 OUT 4 V± 4 V± 5 SENSE 5 SENSE INA592 ±IN +IN Low-impedance connection for reference terminal +V GND RL ±V GND C2 Use ground pours for shielding the input signal pairs GND VOUT 12 k 6 k 2 3 1 6 5 ±IN +IN VOUT OUT IN IN 1 V V V 2 ˜ VREF = GND V± V+ 7 4 12 k 6 k RL RL R1 R2 R3 R4 C1 C2 SENSE OUT REF V±IN V+IN Figure 10-1. Example Schematic and Associated PCB Layout for SOIC and VSSOP Packages INA592 SBOS914E – OCTOBER 2018 – REVISED FEBRUARY 2021 www.ti.com 32 Submit Document Feedback Copyright © 2021 Texas Instruments Incorporated Product Folder Links: INA592 |
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