ADRF5740

Data Sheet

Rev. 0 | Page 12 of 13

APPLICATIONS INFORMATION

LAYOUT CONSIDERATIONS

All measurements in this data sheet are measured on the

ADRF5740-EVALZ-185 evaluation board. The design of the

ADRF5740-EVALZ-185 and the ADRF5740-EVALZ-292

serves as a layout recommendation for the ADRF5740

application.

See the ADRF5740-EVALZ-185 and the ADRF5740-EVALZ-292

user guide for more information on using the evaluation

boards.

BOARD LAYOUT

The ADRF5740-EVALZ-185 and the ADRF5740-EVALZ-292

are 4-layer evaluation boards. The outer copper (Cu) layers are

0.5 oz (0.7 mil) plated to 1.5 oz (2.2 mil) and are separated by

dielectric materials. Figure 25 shows the ADRF5740-EVALZ-185

and the ADRF5740-EVALZ-292 stack up.

RO4003

1.5oz Cu (2.2mil)

1.5oz Cu (2.2mil)

0.5oz Cu (0.7mil)

0.5oz Cu (0.7mil)

1.5oz Cu (2.2mil)

1.5oz Cu (2.2mil)

W = 16mil

G = 6mil

T = 2.2mil

H = 12mil

Figure 25. ADRF5740-EVALZ-185 and ADRF5740-EVALZ-292 Stack Up

All RF and dc traces are routed on the top copper layer, whereas

the inner and bottom layers are grounded planes that provide a

solid ground for the RF transmission lines. The top dielectric

material is 12 mil Rogers RO4003, offering optimal high

frequency performance. The middle and bottom dielectric

materials provide mechanical strength. The overall board

thickness is 62 mil, which allows 1.85 mm RF launchers to be

connected at the board edges.

RF AND DIGITAL CONTROLS

The RF transmission lines are designed using a coplanar

waveguide (CPWG) model, with a trace width of 16 mil and

ground clearance of 6 mil to have a characteristic impedance of

50 Ω. For optimal RF and thermal grounding, as many through

vias as possible are arranged around transmission lines and under

the exposed pad of the package.

The RF input and output ports (ATTIN and ATTOUT) are

connected through 50 Ω transmission lines to the 1.85 mm RF

launchers. On the VDD and VSS supply traces, a 100 pF bypass

capacitor filters high frequency noise.

Figure 26 shows the simplified application circuit for the

ADRF5740.

EPAD

ATTIN

GND

D5

D4

D5

D4

D3

D2

VSS

VDD

GND

ATTOUT

ADRF5740

0

Ω

0

Ω

LE

0

Ω

100pF

VDD

TP1

100pF

VSS

100pF

0

Ω 100pF

0

Ω 100pF

100pF

100pF

ATTIN

ATTOUT

1

2

3

4

12

11

10

9

6

5

7

8

16

15

14

13

Figure 26. Simplified Application Circuit