THS4281DBVT datasheet(20/31 Pages) TI

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WIDEBAND, INVERTING OPERATION

SINGLE-SUPPLY OPERATION

2.49 k

Ω

1.24 k

Ω

0.1

µF

6.8

µF

−VS

50-

Ω Source

0.1

µF

6.8

µF

+VS

0.1

µF

2.49 k

Ω

51.1

Ω

To Load

49.9

Ω

50-

Ω Source

+VS

2 k

Ω

2 k

Ω

+VS

2 k

Ω

50-

Ω Source

2 k

Ω

51.1

Ω

+VS

To Load

Power Supply Bypassing

Not Shown For Simplicity

THS4281

SLOS432 – APRIL 2004

Another consideration in inverting amplifier design is

setting the bias current cancellation resistor (RT) on

Figure 71 shows a typical inverting configuration

the noninverting input. If the resistance is set equal to

where the input and output impedances and noise

the total dc resistance presented to the device at the

gain from Figure 68 are retained with an inverting

inverting terminal, the output dc error (due to the

circuit gain of -1 V/V.

input bias currents) is reduced to the input offset

current multiplied by RT. In Figure 71, the dc source

impedance presented at the inverting terminal is 2.49

Ω || (2.49 kΩ + 25.3 Ω) ≅ 1.24 kΩ. To reduce the

additional high-frequency noise introduced by the

resistor at the noninverting input, RT is bypassed with

a 0.1-µF capacitor to ground (CT).

The THS4281 is designed to operate from a single

2.7-V to 16.5-V power supply. When operating from a

single power supply, care must be taken to ensure

the input signal and amplifier are biased appropriately

to allow for the maximum output voltage swing and

not violate VICR. The circuits shown in Figure 72

shows inverting and noninverting amplifiers con-

figured for single-supply operation.

Figure 71. Wideband, Inverting Gain

Configuration

In the inverting configuration, some key design con-

siderations must be noted. One is that the gain

resistor (Rg) becomes part of the signal channel input

impedance. If the input impedance matching is de-

sired (which is beneficial whenever the signal is

coupled through a cable, twisted pair, long PC board

trace, or other transmission line conductors), Rg may

be set equal to the required termination value and Rf

adjusted to give the desired gain. However, care

must be taken when dealing with low inverting gains,

as the resultant feedback resistor value can present a

significant load to the amplifier output. For example,

an inverting gain of 2, setting Rg to 49.9 Ω for input

matching, eliminates the need for RM but requires a

100-

Ω feedback resistor. The 100-Ω feedback re-

sistor, in parallel with the external load, causes

excessive loading on the amplifier output. To elimin-

ate this excessive loading, it is preferable to increase

both Rg and Rf values, as shown in Figure 71, and

then achieve the input matching impedance with a

Figure 72. DC-Coupled Single Supply Operation

third resistor (RM) to ground. The total input im-

pedance is the parallel combination of Rg and RM.

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