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MSP430F2012IPW Datasheet(PDF) 39 Page - Texas Instruments |
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MSP430F2012IPW Datasheet(HTML) 39 Page - Texas Instruments |
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39 / 80 page ![]() MSP430x20x1, MSP430x20x2, MSP430x20x3 MIXED SIGNAL MICROCONTROLLER SLAS491A − AUGUST 2005 − REVISED OCTOBER 2005 39 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 MSP430x20x2 electrical characteristics over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (continued) 10-bit ADC, built-in voltage reference (MSP430x20x2 only) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT Positive built-in reference analog IVREF+ ≤ 1mA, REF2_5V=0 2.2 VCC VCC,REF+ Positive built-in reference analog supply voltage range IVREF+ ≤ 0.5mA, REF2_5V=1 VREF++0.15 VCC V VCC,REF+ supply voltage range IVREF+ ≤ 1mA, REF2_5V=1 VREF++0.15 VCC V VREF+ Positive built-in reference voltage IVREF+ ≤ IVREF+max, REF2_5V=0 2.2 V/3 V 1.41 1.5 1.59 V VREF+ Positive built-in reference voltage IVREF+ ≤ IVREF+max, REF2_5V=1 3 V 2.35 2.5 2.65 V ILD,VREF+ Maximum VREF+ load current 2.2 V ±0.5 mA ILD,VREF+ Maximum VREF+ load current 3 V ±1 mA VREF+ load regulation IVREF+ = 500 µA +/− 100 µA Analog input voltage VAx ≈ 0.75 V; REF2_5V=0 2.2 V/3 V ±2 LSB VREF+ load regulation IVREF+ = 500 µA ± 100 µA Analog input voltage VAx ≈ 1.25 V; REF2_5V=1 3 V ±2 LSB VREF+ load regulation response time IVREF+ = 100 µA→900µA, VAx 0.5 x VREF+ ADC10SR=0 3 V 400 ns VREF+ load regulation response time VAx ≈ 0.5 x VREF+ Error of conversion result ≤ 1 LSB ADC10SR=1 3V 2000 ns CVREF+ Max. capacitance at pin VREF+ (see Note 1) IVREF+ ≤±1mA, REFON=1, REFOUT=1 2.2 V/3 V 100 pF TCREF+ Temperature coefficient IVREF+ = const. with 0 mA ≤ IVREF+ ≤ 1 mA 2.2 V/3 V ±100 ppm/°C tREFON Settling time of internal reference voltage (see Note 2) IVREF+ = 0.5 mA, REF2_5V=0 REFON = 0 → 1 3.6 V 30 tREFBURST Settling time of reference buffer IVREF+ = 0.5 mA, REF2_5V=0, ADC10SR=0 2.2 V 1 µs tREFBURST Settling time of reference buffer (see Note 2) REF2_5V=0, REFON = 1, REFBURST = 1 ADC10SR=1 2.2 V 2.5 NOTES: 1. The capacitance applied to the internal buffer operational amplifier, if switched to terminal P2.4/TA2/A4/VREF+/VeREF+ (REFOUT=1), must be limited; the reference buffer may become unstable otherwise. 2. The condition is that the error in a conversion started after tREFON or tRefBuf is less than ±0.5 LSB. |
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