MCP4716 datasheet(43/70 Pages) MICROCHIP

43 / 70 page

 2012 Microchip Technology Inc.

DS25154A-page 43

MCP47A1

7.1.3

AMPLIFIER INPUT VOLTAGE (VW)

To ensure that the amplifier is operating in its linear

range, the voltage (VW) into the output amplifier’s input

has requirements that must be met.

For device VDD voltages  2.7V, the amplifier is in the

linear region for all VREF voltages ( 1.0V) and DAC

For device VDD voltages < 2.7V, there will be a voltage

where the amplifier output is no longer linear with the

amplifier input voltage (VW). This is shown in Figure 2-

20, where VDD = 1.8V and the VREF = 1.6V. Higher

DAC register codes are the first to encounter the

nonlinearity of the output buffer. The nonlinearity is also

influenced by the temperature of operation.

Figure 7-2 shows the trend of the amplifier linearity

based on the device VDD / VREF voltages and the input

voltage to the amplifier. The trend will also be affected

by device temperature. VNL is the voltage where the

amplifier’s output becomes nonlinear. While the VW

voltage is less than the VNL voltage, the amplifier’s out-

put is linear. Once the device VDD has been lowered to

where the amplifier’s nonlinear range increases, the

two methods to keep VW < VNL are:

Lower the VREF voltage

Decrease the DAC Register code

Both methods reduce the maximum usable output

voltage.

FIGURE 7-2:

Amplifier Input (VW) to

Amplifier Output (VOUT) General Characteristics

(VREF = VDD).

Figure 7-3 shows the equations for solving for VOUT

voltage, the VREF voltage, or the maximum DAC

two of these variables. For VDD voltages below the

specified analog performance voltage (2.7V), the

calibration of the device could be done to ensure VOUT

voltage is not driven into the output amplifier nonlinear

region via the DAC Register value / VREF voltage.

Using the measured VNL voltage as the VOUT voltage

will allow you to balance your selection of the VREF

voltage and maximum DAC Code. The DAC Register

code of 64 is the full-scale code.

FIGURE 7-3:

Solving for VOUT, VREF, or

DAC Register Code.

Ideal

VOUT

0VDD / VREF

VDD /

Actual

VREF

(Based on device

VDD = 1.8V

VDD = 5.5V

VDD and temperature)

VOUT = VREF *

DAC Code

VREF =

64 * VOUT

DAC Code

DAC Code =

64 * VOUT

VREF

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