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INA821 Datasheet(PDF) 7 Page - Texas Instruments |
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INA821 Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 47 page ![]() 7.6 Electrical Characteristics: G = 2 (continued) at VS = ±2.25 V to ±18 V, TA = 25°C, VCM = VOUT = VS / 2, RL = 10 kΩ connected to ground, and REF pin connected to ground (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP MAX UNIT THD+N Total harmonic distortion + noise f = 1 kHz, VOUT = 2.8 VRMS 0.00066 % Noise floor, RTO 80-kHz bandwidth, VOUT = 3.5 VRMS –110 dB tDR Overload recovery time 200 ns POWER SUPPLY IQ Quiescent current IOUT = 0 mA TA = 25°C 1.1 1.2 mA TA = –40°C to +125°C 1.5 mA (1) Specified by wafer test to 95% confidence level. 7.7 Typical Characteristics at TA = 25°C, VS = ±18 V, VCM = VOUT = VS / 2, RL = 10 kΩ, REF pin connected to ground, G = 1/2 (unless otherwise noted) Table 7-1. Table of Graphs DESCRIPTION FIGURE Typical Distribution of Offset Voltage (RTO) G= 1/2, VS = ±2.25 V Figure 7-1 Typical Distribution of Offset Voltage (RTO) G= 2, , VS = ±2.25 V Figure 7-2 Typical Distribution of Offset Voltage (RTO) G= 1/2, , VS = ±18 V Figure 7-3 Typical Distribution of Offset Voltage (RTO) G= 2, VS = ±18 V Figure 7-4 Typical Distribution of Offset Voltage Drift (RTO) G = 1/2 Figure 7-5 Typical Distribution of Offset Voltage Drift (RTO) G = 2 Figure 7-6 Output Offset Voltage vs Temperature G = 1/2 Figure 7-7 Output Offset Voltage vs Temperature G = 2 Figure 7-8 Offset Voltage vs Common-Mode Voltage G = 1/2 Figure 7-9 Offset Voltage vs Common-Mode Voltage G = 2 Figure 7-10 Input Bias Current vs Temperature G = 1/2 and G = 2 Figure 7-11 Input Offset Current vs Temperature Figure 7-12 Input Bias Current vs Common Mode Voltage G = 1/2 Figure 7-13 Input Bias Current vs Common Mode Voltage G = 2 Figure 7-14 Typical CMRR Distribution G= 1/2, Vs = ±2.25 V Figure 7-15 Typical CMRR Distribution G = 2, Vs = ±2.25 V Figure 7-16 Typical CMRR Distribution G= 1/2, Vs = ±18 V Figure 7-17 Typical CMRR Distribution G = 2, Vs = ±18 V Figure 7-18 CMRR vs Temperature G= 1/2 Figure 7-19 CMRR vs Temperature G= 2 Figure 7-20 Common-Mode Rejection Ratio vs Frequency (RTI) G = 1/2 and 2 Figure 7-21 Maximum Output Voltage vs Frequency Figure 7-22 PSRR vs Temperature G = 1/2 Figure 7-23 PSRR vs Temperature G = 2 Figure 7-24 PSRR vs Frequency (RTI) G = 1/2 Figure 7-25 PSRR vs Frequency (RTI) G = 2 Figure 7-26 Typical Distribution of Gain Error G = 1/2, VS = ±2.25 V Figure 7-27 Typical Distribution of Gain Error G = 2, VS = ±2.25 V Figure 7-28 Gain Error vs Temperature G = 1 /2 Figure 7-29 Gain Error vs Temperature G = 2 Figure 7-30 Closed-Loop Gain vs Frequency G = 1/2 Figure 7-31 Closed-Loop Gain vs Frequency G = 2 Figure 7-32 Voltage Noise Spectral Density vs Frequency (RTI) G = 1/2 Figure 7-33 www.ti.com INA597 SBOS385B – AUGUST 2019 – REVISED APRIL 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 7 Product Folder Links: INA597 |
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