PIMXRT516SCVP5A datasheet(32/124 Pages) NXP

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i.MX RT1160 Crossover Processors Data Sheet for Extended Industrial Products, Rev. 0, 04/2021

NXP Semiconductors

Electrical characteristics

Table 14 shows the typical wakeup time.

4.2

System power and clocks

This section provides the information about the system power and clocks.

4.2.1

Power supplies requirements and restrictions

The system design must comply with power-up sequence, power-down sequence, and steady state

guidelines as described in this section to guarantee the reliable operation of the device. Any deviation

from these sequences may result in the following situations:

•

Excessive current during power-up phase

•

Prevention of the device from booting

Set Point

#15 Standby

Suspend

• Lower voltage to 0.8 V with RBB mode for LPSR

domain

• System is on STANDBY mode

• CM7 is power off, CM4 is on SUSPEND mode

• CM4 TCM with ECC is on retention

• DCDC is off, LDO_LPSR_ANA and

LDO_LPSR_DIG are active

• All clock sources are turned off except for 32 kHz

RTC

• All PLLs are power gated

• The WAKEUPMIX domain, MEGAMIX domain,

and DISPLAYMIX domain are power gated

• All peripherals in LPSRMIX domain are clock

gated, but remain powered

DCDC_IN

26.1

52.4

A

VDD_LPSR_IN

0.503

7.9

VDD_SNVS_IN

3.8

18.1

A

Total

1.759

26.303

SNVS

• Only SNVS domain is powered

• 32 kHz RTC is alive

• DCDC_IN and VDD_LPSR_IN are power gated

DCDC_IN

A

VDD_LPSR_IN

A

VDD_SNVS_IN

3.8

18.4

A

Total

12.54

60.72

W

1 Code runs in the ITCM; typical values are the average values on typical process wafers.

Table 14. Typical wakeup time1

1 Please refer to Table 13 for Set Point modes definition, and the only difference between Set Point #15 Standby Suspend mode

and Set Point #15 Standby Stop mode is the Suspend mode versus Stop mode on CM4 core.

Description

Typical wakeup time

Unit

From Set Point #0 Standby Suspend to Set Point #0 normal drive RUN

4.13

From Set Point #5 Standby Suspend to Set Point #0 normal drive RUN

4.79

From Set Point #10 Standby Suspend to Set Point #0 normal drive RUN

5.47

From Set Point #15 Standby Stop to Set Point #0 normal drive RUN

7.6

From SNVS mode to ROM exit

8.97

Table 13. Typical power modes current and power consumption (Dual core) (continued)

PIMXRT516SCVP5A Datasheet(PDF) 32 Page - NXP Semiconductors

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