ACE25QC160GLFMLTH datasheet(11/73 Pages) ACE

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ACE25QC160G

16M BIT SPI NOR FLASH

VER 1.2

The Status and Control Bits

(A)

WIP bit

The Write in Progress (WIP) bit indicates whether the memory is busy in program/erase/write status

progress.

(B)

WEL bit

The Write Enable Latch bit indicates the status of the internal Write Enable Latch. When set to 1 the

internal Write Enable Latch is set, when set to 0 the internal Write Enable Latch is reset and no Write

Status Register, Program or Erase instruction is accepted.

(C)

BP4, BP3, BP2, BP1, BP0 bits

The Block Protect (BP4, BP3, BP2, BP1, BP0) bits are non-volatile. They define the size of the area to

be software protected against Program and Erase instructions. These bits are written with the Write

Status Register instruction. When the Block Protect (BP4, BP3, BP2, BP1, BP0) bits are set to 1, the

relevant memory area (as defined in Table 6 and Table 7).becomes protected against Page Program,

Sector Erase and Block Erase instructions. The Block Protect (BP4, BP3, BP2, BP1, BP0) bits can be

written provided that the Hardware Protected mode has not been set. The Chip Erase(CE) instruction

is executed, if the Block Protect(BP2,BP1,BP0)bits are 0 and CMP=0 or The Block Protect (BP2, BP1,

BP0) bits are1 and CMP=1.

(D)

SRP1, SRP0 bits

The Status Register Protect (SRP1 and SRP0) bits are non-volatile Read/Write bits in the status

power supply lock-down or one time programmable protection.

(E)

QE bit

The Quad Enable (QE) bit is a non-volatile Read/Write bit in the Status Register that allows Quad

operation. When the QE bit is set to 0 (Default) the /WP pin and /HOLD pin are enable. When the QE

pin is set to 1, the Quad IO2 and IO3 pins are enabled. (The QE bit should never be set to 1 during

standard SPI or Dual SPI operation if the /WP or /HOLD pins directly to the power supply or ground).

(F)

LB3/LB2/LB1 bit

The LB bit is a non-volatile One Time Program (OTP) bit in Status Register (S13–S11) that provide the

write protect control and status to the Security Registers. The default state of LB is 0, the security

registers are unlocked. LB can be set to 1 individually using the Write Register instruction. LB is One

Time Programmable, once they are set to 1, the Security Registers will become read-only

permanently.

ACE25QC160GLFMLTH Datasheet(PDF) 11 Page - ACE Technology Co., LTD.