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QM55003 Datasheet(PDF) 13 Page - Qorvo, Inc |
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QM55003 Datasheet(HTML) 13 Page - Qorvo, Inc |
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13 / 25 page ![]() QM55003 Mid-Band Low-Band NB_IoT TxM QM55003 Data Sheet REV C | Subject to change without notice 13 of 25 www.qorvo.com PRELIMINARY Table 1: RFFE MIPI Register Map (1 of 4) Register Details This section displays each register in table form. Table headers described here: TRIG. – Indicates whether the Write Command can be triggered. The value in the Trig. Column indicates which trigger causes the Bit Field to be loaded from t he shadow register. “T012” means that any or all triggers will cause a load from shadow register. Register 0 (0x00) – PA_CTRL0 BIT(S) FIELD NAME DEFAULT DESCRIPTION R/W B/ G TRIG. 7:6 Reserved[1:0] 0b00 This is a read-only bit that is reserved and yields a value of 0 at readback R No No 5:3 PA_BAND[2:0] 0b000 PA Band 000: off 001: AUX2 010: AUX1 011: RX_HB 100: LB_TX 101: Reserved 110: MB_TX 111: RX_LB R/W T012 2 TX_EN[2] 0b0 Transmit Enable 0 = Transmit mode disabled 1 = Transmit mode enabled Set this bit to 1 to turn on the module’s PA for LB or MB transmit or to use one of the four TRX ports in transmit mode. R/W T012 1 PA_MODE[1] 0b0 PA Power Control Mode 0 = HPM 1 = LPM R/W No 0 Reserved[0] 0b0 This is a read-only bit that is reserved and yields a value of 0 at readback. R/W No Register 1 (0x01) – PA_CTRL1 BIT(S) FIELD NAME DEFAULT DESCRIPTION R/W B/G TRIG. 7:4 PA_BIAS2[3:0] 0b0000 PA Bias – power stage R/W No T012 3:0 PA_BIAS1[3:0] 0b0000 PA Bias – driver stage R/W No T012 Register 2 (0x02) – PA_CTRL2 BIT(S) FIELD NAME DEFAULT DESCRIPTION R/W B/G TRIG. 7:4 Reserved[3:0] 0b0000 These are a read-only bits that are reserved and yield a value of 0 at readback. R/W No No 3:0 PA_TUNE[3:0] 0b0000 PA Tuning Cap R/W No T012 |
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