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SLG46517 Datasheet(PDF) 21 Page - Dialog Semiconductor |
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SLG46517 Datasheet(HTML) 21 Page - Dialog Semiconductor |
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21 / 190 page  Datasheet 22-Jul-2021 CFR0011-120-00 Revision 3.6 21 of 190 © 2021 Dialog Semiconductor SLG46517 GreenPAK Programmable Mixed-Signal Matrix with ASM and Dual 44 m Ω/2 A P-FET tpd Delay Digital input to PMOS output 44 - 19 - 14 - ns tpd Delay Digital input to NMOS output - 81 - 30 - 20 ns tpd Delay Output enable from pin, OE Hi-Z to 1 48 - 20 - 15 - ns tpd Delay Output enable from pin, OE Hi-Z to 0 -46-20 -14 ns tpd Delay LUT2bit(LATCH) 34 33 14 13 10 9 ns tpd Delay LATCH(LUT2bit) 30 34 14 13 10 9 ns tpd Delay LUT3bit(LATCH) 38 37 18 15 13 10 ns tpd Delay LATCH+nRESET(LUT3bit) 45 42 21 17 15 12 ns tpd Delay LATCH 33 35 14 14 11 10 ns tpd Delay LUT4bit 28 33 14 13 10 9 ns tpd Delay LUT2bit 31 31 14 13 10 9 ns tpd Delay LUT3bit 35 33 15 13 11 10 ns tpd Delay CNT/DLY Logic 62 68 27 29 19 20 ns tpd Delay DFF 32 28 14 12 11 9 ns tpd Delay P_DLY1C 367 356 165 160 123 119 ns tpd Delay P_DLY2C 667 656 303 297 225 221 ns tpd Delay P_DLY3C 968 956 440 434 327 322 ns tpd Delay P_DLY4C 1265 1252 576 570 428 423 ns tpd Delay Filter 213 210 84 83 55 55 ns tpd Delay ACMP (5mV overdrive) 1600 1900 1500 1800 1600 1800 ns tw Pulse Width IO with 1x Push-Pull (min transmit- ted) 20 20 20 20 20 20 ns tw Pulse Width filter (min transmitted) 150 150 55 55 35 35 ns Table 13: Typical Propagations Delays and Pulse Widths at T = 25 °C Parameter Description Note VDD = 1.8 V VDD = 3.3V VDD = 5.0V Unit tw Pulse Width, 1 cell mode: (any)edge detect, edge detect output 296 135 101 ns tw Pulse Width, 2 cell mode: (any)edge detect, edge detect output 597 272 203 ns tw Pulse Width, 3 cell mode: (any)edge detect, edge detect output 898 410 305 ns tw Pulse Width, 4 cell mode: (any)edge detect, edge detect output 1195 546 407 ns time1 Delay, 1 cell mode: (any)edge detect, edge detect output 55 2418 ns time1 Delay, 2 cell mode: (any)edge detect, edge detect output 55 2418 ns time1 Delay, 3 cell mode: (any)edge detect, edge detect output 55 2418 ns time1 Delay, 4 cell mode: (any)edge detect, edge detect output 55 2418 ns time2 Delay, 1 cell mode: both edge delay, edge detect output 367 165 106 ns time2 Delay, 2 cell mode: both edge delay, edge detect output 667 300 193 ns Table 12: Typical Delay Estimated for Each Macrocell at T = 25 °C(Continued) Parameter Description Note VDD = 1.8 V VDD = 3.3V VDD = 5.0V Unit Rising Falling Rising Falling Rising Falling |
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