OUTPUT VOLTAGE

The output voltage is set using the following equation where

R2 is connected between the FB pin and GND, and R1 is

connected between V

is 10k

Ω.

PCB Layout Considerations

When planning layout there are a few things to consider

when trying to achieve a clean, regulated output. The most

important consideration when completing the layout is the

close coupling of the GND connections of the C

and the catch diode D1. These ground ends should be close

to one another and be connected to the GND plane with at

least two through-holes. Place these components as close to

the IC as possible. Next in importance is the location of the

GND connection of the C

near the GND connections of C

There should be a continuous ground plane on the bottom

layer of a two-layer board except under the switching node

island.

The FB pin is a high impedance node and care should be

taken to make the FB trace short to avoid noise pickup and

inaccurate regulation. The feedback resistors should be

placed as close as possible to the IC, with the GND of R2

placed as close as possible to the GND of the IC. The V

OUT

trace to R1 should be routed away from the inductor and any

other traces that are switching.

High AC currents flow through the V

so they should be as short and wide as possible. However,

making the traces wide increases radiated noise, so the

designer must make this trade-off. Radiated noise can be

decreased by choosing a shielded inductor.

The remaining components should also be placed as close

as possible to the IC. Please see Application Note AN-1229

for further considerations and the LM2734Z demo board as

an example of a four-layer layout.

Calculating Efficiency, and

Junction Temperature:

The complete LM2734Z DC/DC converter efficiency can be

calculated in the following manner.

Or

Calculations for determining the most significant power

losses are shown below. Other losses totaling less than 2%

are not discussed.

Power loss (P

the converter, switching and conduction. Conduction losses

usually dominate at higher output loads, where as switching

losses remain relatively fixed and dominate at lower output

loads. The first step in determining the losses is to calculate

the duty cycle (D).

V

on, and is equal to:

V

V

can be obtained from the Electrical Characteristics section. If

the voltage drop across the inductor (V

the equation becomes:

This usually gives only a minor duty cycle change, and has

been omitted in the examples for simplicity.

The conduction losses in the free-wheeling Schottky diode

are calculated as follows:

P

Often this is the single most significant power loss in the

circuit. Care should be taken to choose a Schottky diode that

has a low forward voltage drop.

Another significant external power loss is the conduction

loss in the output inductor. The equation can be simplified to:

P

DCR

The LM2734Z conduction loss is mainly associated with the

internal NFET:

P

Switching losses are also associated with the internal NFET.

They occur during the switch on and off transition periods,

where voltages and currents overlap resulting in power loss.

The simplest means to determine this loss is to empirically

measuring the rise and fall times (10% to 90%) of the switch

at the switch node:

P

P

P

Typical Rise and Fall Times vs Input Voltage

V

IN

T

RISE

T

FALL

5V

8ns

4ns

10V

9ns

6ns

15V

10ns

7ns

Another loss is the power required for operation of the inter-

nal circuitry:

P

I

1.5mA. The other operating power that needs to be calcu-

lated is that required to drive the internal NFET:

P

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