ICS83948AYILF datasheet(1/10 Pages) ICST

Part #	ICS83948AYILF

Description	LOW SKEW, 1-TO-12 DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

PDF	10 Pages

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Manufacturer	ICST [Integrated Circuit Systems]

Direct Link	http://www.icst.com

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1 / 10 page

83948AYI

www.icst.com/products/hiperclocks.html

REV. C DECEMBER 15, 2005

1

Integrated

Circuit

Systems, Inc.

ICS83948I

LOW SKEW, 1-TO-12

DIFFERENTIAL-TO-LVCMOS FANOUT BUFFER

GENERAL DESCRIPTION

The ICS83948I is a low skew, 1-to-12 Differen-

tial-to-LVCMOS Fanout Buffer and a member

of the HiPerClockS™ family of High Performance

Clock Solutions from ICS. The ICS83948I has

two selectable clock inputs. The CLK, nCLK

pair can accept most standard differential input levels. The

LVCMOS_CLK can accept LVCMOS or LVTTL input levels.

The low impedance LVCMOS outputs are designed to drive

50

Ω series or parallel terminated transmission lines. The

effective fanout can be increased from 12 to 24 by utilizing

the ability of the outputs to drive two series terminated lines.

The ICS83948I is characterized at 3.3V core/3.3V output.

Guaranteed output and part-to-part skew characteristics

make the ICS83948I ideal for those clock distribution ap-

plications demanding well defined performance and re-

peatability.

BLOCK DIAGRAM

PIN ASSIGNMENT

FEATURES

• Twelve LVCMOS outputs

• Selectable LVCMOS clock or differential CLK, nCLK inputs

• CLK, nCLK pair can accept the following differential

input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL

• LVCMOS_CLK accepts the following input levels:

LVCMOS or LVTTL

• Maximum output frequency: 250MHz

• Output skew: 350ps (maximum)

• Part to part skew: 1.5ns (maximum)

• 3.3V core, 3.3V output

• -40°C to 85°C ambient operating temperature

• Available in both standard and lead-free RoHS-compliant

packages

HiPerClockS™

ICS

32-Lead LQFP

7mm x 7mm x 1.4mm package body

Y Package

Top View

32 31 30 29 28 27 26 25

9

10 11 12 13 14 15 16

1

2

3

4

5

6

7

8

24

23

22

21

20

19

18

17

GND

Q4

VDDO

Q5

GND

Q6

VDDO

Q7

CLK_SEL

LVCMOS_CLK

CLK

nCLK

CLK_EN

OE

VDD

GND

ICS83948I

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

Q8

Q9

Q10

Q11

LVCMOS_CLK

CLK

nCLK

1

0

CLK_EN

CLK_SEL

D

Q

LE

OE

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