LAN9255

DS00003646B-page 14

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2020-2021 Microchip Technology Inc.

4.1.1

INTERNAL PIN MAPPING

Figure 4-2 and Figure 4-3 detail the LAN9255 internal pin mappings between the integrated LAN9253 and SAM E53J,

respectively.

FIGURE 4-2:

LAN9253 INTERNAL PIN MAPPING

LAN9255

128

OSCI

1

OSCI

A0/D15/AD15/DIGIO9/GPI9/

GPO9/MII_RXER

66

33

A0/D15/AD15/DIGIO9/GPI9/

GPO9/MII_RXER

1

OSCO

2

OSCO

SYNC0/LATCH0/PME

70

34

SYNC0/LATCH0/PME

4

OSCVDD12

3

OSCVDD12

D3/AD3/WD_TRIG/SIO3/

EE_EMUL_SPI1

71

35

D3/AD3/WD_TRIG/SIO3/

EE_EMUL_SPI1

6

OSCVSS

4

OSCVSS

D6/AD6/DIGIO0/GPI0/GPO0/

MII_RXCLK

72

36

D6/AD6/DIGIO0/GPI0/GPO0/

MII_RXCLK

7

VDD33

5

VDD33

VDDIO

74

37

VDDIO_J

12

VDDCR

6

VDDCR

VDDCR

76

38

VDDCR

13

REG_EN

7

REG_EN

D7/AD7/DIGIO1/GPI1/GPO1/

MII_MDC

78

39

D7/AD7/DIGIO1/GPI1/GPO1/

MII_MDC

14

CLK_25/CLK_25_EN/

XTAL_MODE

8

CLK_25/CLK_25_EN/

XTAL_MODE

D8/AD8/DIGIO2/GPI2/GPO2/

MII_MDIO

80

40

D8/AD8/DIGIO2/GPI2/GPO2/

MII_MDIO

17

ERR_LED/PME/100FD_B/

LEDPOL4

9

ERR_LED/PME/100FD_B/

LEDPOL4

TESTMODE

81

41

TESTMODE

18

WAIT_ACK/PME/LATCH0/

EE_EMUL_SPI3

10

WAIT_ACK/PME/LATCH0/

EE_EMUL_SPI3

EESDA/TMS/EE_EMUL1

82

42

EESDA/TMS/EE_EMUL1

21

RST#

11

RST#

EESCL/TCK/EE_EMUL2

83

43

EESCL/TCK/EE_EMUL2

24

D2/AD2/SOF/SIO2/

EE_EMUL_SPI0

12

D2/AD2/SOF/SI O2/

EE_EMUL_SPI0

IRQ/LATCH1

88

44

IRQ/LATCH1

26

D1/AD1/EOF/SO/SIO1

13

D1/AD1/EOF/SO/SI O1

RUNLED/STATERUN_LED/

E2PSIZE/EE_EMUL0/LEDPOL3

89

45

RUNLED/STATERUN_LED/

E2PSIZE/EE_EMUL0/LEDPO L3

29

VDDIO

14

VDDIO_J

LINKACTLED1/TDI/

CHIP_MODE1/LEDPOL1

90

46

LINKACTLED1/TDI/

CHIP_MODE1/LEDPOL1

31

D14/AD14/DIGIO8/GPI8/GPO8/

MII_TXD3/TX_SHIFT1

15

D14/AD14/DIGIO8/GPI8/GPO8/

MII_TXD3/TX_SHIFT1

VDDIO

94

47

VDDIO_J

32

D13/AD13/DIGIO7/GPI7/GPO7/

MII_TXD2/TX_SHIFT0

16

D13/AD13/DIGIO7/GPI7/GPO7/

MII_TXD2/TX_SHIFT0

LINKACTLED0/TDO/

CHIP_MODE0/100FD_A/LEDPOL0

95

48

LINKACTLED0/TDO/

CHIP_MODE0/100FD_A/LEDPOL0

38

D0/AD0/WD_STATE/SI/SIO0

17

D0/AD0/WD_STATE/SI/SI O0

D4/AD4/DIGIO3/GPI3/GPO3/

MII_LINK

100

49

D4/AD4/DIGIO3/GPI3/GPO3/

MII_LINK

39

SYNC1/LATCH1/PME

18

SYNC1/LATCH1/PME

D5/AD5/OUTVALID/SCS#

101

50

D5/AD5/OUTVALID/SCS#

41

D9/AD9/LATCH_IN/SCK

19

D9/AD9/LATCH_IN/SCK

VDD33TXRX1

102

51

VDD33TXRX1

45

VDDIO

20

VDDIO_J

TXNA

103

52

TXNA

49

D12/AD12/DIGIO6/GPI6/GPO6/

MII_TXD1/100FD_B

21

D12/AD12/DIGIO6/GPI6/GPO6/

MII_TXD1/100FD_B

TXPA

104

53

TXPA

50

D11/AD11/DIGIO5/GPI5/GPO5/

MII_TXD0/100FD_A

22

D11/AD11/DIGIO5/GPI5/GPO5/

MII_TXD0/100FD_A

RXNA

105

54

RXNA

51

D10/AD10/DIGIO4/GPI4/GPO4/

MII_TXEN

23

D10/AD10/DIGIO4/GPI4/GPO4/

MII_TXEN

RXNP

106

55

RXNP

52

VDDCR

24

VDDCR

VDD12TX1

110

56

VDD12TX1

53

A1/ALELO/OE_EXT/

MII_CLK25/EE_EMUL_SPI2

25

A1/ALELO/OE_EXT/

MII_CLK25/EE_EMUL_SPI2

RBIAS

111

57

RBIAS

54

A3/BE0/DIGIO11/GPI11/GPO11/

MII_RXDV

26

A3/BE0/DIGIO11/GPI11/GPO11/

MII_RXDV

VDD33BIAS

112

58

VDD33BIAS

55

A4/BE1/DIGIO12/GPI12/GPO12/

MII_RXD0

27

A4/BE1/DIGIO12/GPI12/GPO12/

MII_RXD0

VDD12TX2

113

59

VDD12TX2

56

CS/DIGIO13/GPI13/GPO13/

MII_RXD1

28

CS/DIGIO13/GPI13/GPO13/

MII_RXD1

RXPB

115

60

RXPB

57

A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/

EE_EMUL_ALELO_POL/MII_LINKPOL/LEDPOL2

29

A2/ALEHI/DIGIO10/GPI10/GPO10/LINKACTLED2/

EE_EMUL_ALELO_POL/MII_LINKPOL/LEDPOL2

RXNB

116

61

RXNB

58

WR/ENB/DIGIO14/GPI14/

GPO14/MII_RXD2

30

WR/ENB/DIGIO14/GPI14/

GPO14/MII_RXD2

TXPB

118

62

TXPB

59

RD/RD_WR/DIGIO15/GPI15/

GPO15/MII_RXD3

31

RD/RD_WR/DIGIO15/GPI15/

GPO15/MII_RXD3

TXNB

119

63

TXNB

60

VDDIO

32

VDDIO_J

VDD33TXRX2

124

64

VDD33TXRX2

NC

85

NC

86

Exposed Pad

LAN9253

VSS