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ICS848004I Datasheet(PDF) 1 Page - Integrated Circuit Systems |
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ICS848004I Datasheet(HTML) 1 Page - Integrated Circuit Systems |
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1 / 11 page ![]() 848004AGI www.icst.com/products/hiperclocks.html REV. A AUGUST 18, 2005 1 Integrated Circuit Systems, Inc. ICS848004I FEMTOCLOCKS™CRYSTAL-TO- SSTL_2 FREQUENCY SYNTHESIZER PRELIMINARY GENERAL DESCRIPTION The ICS848004I is a 4 output SSTL_2 Synthesizer optimized to generate Fibre Channel reference clock frequencies and is a member of the HiPerClocksTM family of high performance clock solutions from ICS. Using a 26.5625MHz 18pF parallel resonant crystal, the following frequencies can be generated based on the 2 frequency select pins (F_SEL[1:0]): 212.5MHz, 187.5MHz, 159.375MHz, 156.25MHz, 106.25MHz and 53.125MHz. The ICS848004I uses ICS’ 3rd generation low phase noise VCO technology and can achieve 1ps or lower typical rms phase jitter, easily meeting Fibre Channel jitter requirements. The ICS848004I is packaged in a small 24-pin TSSOP package. FEATURES • Four SSTL_2 differential clock output pairs • Selectable crystal oscillator interface or LVCMOS/LVTTL single-ended input • Supports the following output frequencies: 212.5MHz, 187.5MHz, 159.375MHz, 156.25MHz, 106.25MHz, 53.125MHz • VCO range: 560MHz - 680MHz • RMS phase jitter @ 212.5MHz, using a 26.5625MHz crystal (637kHz - 10MHz): 0.80ps (typical) • SSTL operating voltage supply ranges: V DD = 3.0V to 3.6V, VDDO = 3.0V to 3.6V V DD = 2.3V to 3.6V, VDDO = 2.3V to 2.7V V DD = 2.3V to 3.6V, VDDO = 1.7V to 1.9V • -40°C to 85°C ambient operating temperature HiPerClockS™ ICS PIN ASSIGNMENT 1 1 0 1 0 Phase Detector VCO 637.5MHz (w/26.5625MHz Reference) M = 24 (fixed) F_SEL[1:0] 0 0 ÷3 0 1 ÷4 1 0 ÷6 1 1 ÷12 2 OSC ICS848004I 24-Lead TSSOP 4.40mm x 7.8mm x 0.92mm package body G Package Top View nQ1 Q1 VDDo Q0 nQ0 MR nPLL_SEL nc VDDA F_SEL0 VDD F_SEL1 1 2 3 4 5 6 7 8 9 10 11 12 nQ2 Q2 VDDO Q3 nQ3 GND nc nXTAL_SEL TEST_CLK GND XTAL_IN XTAL_OUT 24 23 22 21 20 19 18 17 16 15 14 13 BLOCK DIAGRAM s t u p n I t u p t u O y c n e u q e r F ) z H M ( t u p n I y c n e u q e r F ) z H M ( 1 L E S _ F0 L E S _ F r e d i v i D M e u l a V r e d i v i D N e u l a V r e d i v i D N / M e u l a V 5 2 6 5 . 6 20 0 4 23 8 5 . 2 1 2 5 2 6 5 . 6 20 1 4 24 6 5 7 3 . 9 5 1 5 2 6 5 . 6 21 0 4 26 4 5 2 . 6 0 1 5 2 6 5 . 6 21 1 4 22 12 5 2 1 . 3 5 6 6 1 4 0 . 6 20 1 4 24 6 5 2 . 6 5 1 5 7 3 4 . 3 20 0 4 23 8 5 . 7 8 1 FREQUENCY SELECT FUNCTION TABLE F_SEL[1:0] nPLL_SEL TEST_CLK XTAL_IN XTAL_OUT nXTAL_SEL MR Q0 nQ0 Q1 nQ1 Q2 nQ2 Q3 nQ3 Pulldown Pulldown 26.5625MHz Pulldown Pulldown Pulldown The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. |
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