Z8FMC16100 datasheet(52/402 Pages) ZILOG

52 / 402 page

Reset and Stop-Mode Recovery

P R E L I M I N A R Y

PS024604-1005

Z8 Encore!® Motor Control Flash MCUs

Product Specification

The FLTSEL bit in this register allows software selection of the RESET pin. The pin func-

tion is selected by writing the unlock sequence followed by the mode to this register. A

software write to the FLTSEL bit will override the value set by the FLTSEL user option bit.

0 = RESET/Fault0 pin is configured as RESET input.

1= RESET/Fault0 pin is configured as Fault0 input.

Table 9. Reset Status and Control Register (RSTSCR)

BITS

FIELD

POR

STOP

WDT

EXT

FLT

Reserved

FLTSEL

RESET

See Table 10 below

R/W

ADDR

FF0H

Table 10. Reset Status Register Values Following Reset

Reset or Stop-Mode Recovery Event

POR

STOP

WDT

EXT

FLT

Power-On Reset

100

Reset using RESET pin assertion

000

Reset using Watch-Dog Timer time-out

001

Reset by OCD writing OCDCTL[0] to 1

100

Reset from Fault Detect Logic

000

Stop-Mode Recovery using GPIO pin transition

010

Stop-Mode Recovery using Watch-Dog Timer time-out

011

Note: Additional bits may be set depending on the number of resets simultaneously occurring.

Z8FMC16100 Datasheet(PDF) 52 Page - Zilog, Inc.

Z8FMC16100 Datasheet(HTML) 52 Page - Zilog, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL