Z8922320FSC datasheet(39/60 Pages) ZILOG

39 / 60 page

Z89223/273/323/373

ZiLOG

16-Bit Digital Signal Processors with A/D Converter

DS000202-DSP0599

ADE (Bit 15).

A “0” disables any A/D conversions or ac-

cessing any A/D registers, except writing to the ADE bit.

A “1” enables all A/D accesses.

Reserved (Bits 14, 13).

Reserved for future use.

ADCINT (Bit 12).

The A/D interrupt bit is read-only. The

ADCINT will reset every time this register is written.

ADIT (Bit 11).

Selects when to set the A/D interrupt if in-

terrupts are enabled (ADIE=1). A value of “0” sets the in-

terrupt after the first A/D conversion is complete. A value

of “1” sets the interrupt after the fourth A/D conversion is

complete.

ADIE (Bit 10).

A/D Interrupt Enable. A value of “0” dis-

ables the A/D Interrupt. A value of “1” enables the A/D In-

terrupt.

There are four A/D result registers. See the EXT Register

Assignments for their location in the different banks.

Figure 29. ADCTL Register (LSB)

Table 18. A/D Prescaler Values (Bits 7, 6, 5)

DIV2

DIV1

DIV0

A/D Prescaler

(Crystal divided by)

000

001

010

011

100

101

110

111

Table 19. Operating Modes (Bits 4, 3)

QUAD

SCAN

Option

Convert selected channel 4 times,

then stop

Convert selected channel,

then stop.

Convert 4 channels,

then stop.

Convert 4 channels

continuously.

Table 20. Channel Select (Bits 1, 0)

CSEL1

CSEL0

Channel

AN0

AN1

AN2

AN3

DIV0

Bank13/EXT0 (LSB)

DIV1

DIV2

CSEL0

CSEL1

(Reserved)

SCAN

QUAD

D7 D6 D5 D4 D3 D2 D1 D0

Figure 30. ADCTL Register (MSB)

Table 21. START (Bits 9, 8)

ADST1

ADST0

Option

Conversion starts when this

Conversion starts on INT1 per

Interrupt Allocation Register

Conversion starts on C/T2

time-out.

Conversion starts on C/T0

time-out.

ADST0

ADST1

D15 D14 D13 D12 D11 D10 D9 D8

ADIE

(Reserved)

Bank13/EXT0 (MSB)

ADE

ADCINT

ADIT

Z8922320FSC Datasheet(PDF) 39 Page - Zilog, Inc.

Z8922320FSC Datasheet(HTML) 39 Page - Zilog, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Datasheet Download

Link URL