MWPR1124ZVHT datasheet(80/86 Pages) NXP

80 / 86 page

8.3.3 System Modules

This section contains tables describing the system signals.

Table 55. System Module Signal Descriptions

SoC Signal Name

Module Signal Name

Description

I/O

NMI_b

—

Non-maskable interrupt

RESET_b

—

Reset bidirectional signal

I/O

VDD_[1:0]

VDD

Power supply

Ground

VSS

Ground

VDD_RF[3:1]

VDD_RF

Radio power supply

VDCDC_IN

VDD_1P8OUT

VDD_1P8

DCDC 1.8 V Regulated

Output / Input in bypass

I/O

VDD_1P5OUT_PMCIN

VDD_1P5/VDD_PMC

DCDC 1.5 V Regulated

Output / PMC Input in bypass

I/O

PSWITCH

DCDC enable switch

DCDC_CFG

DCDC switch mode select

DCDC_LP

DCDC inductor input positive I/O

DCDC_LN

DCDC inductor input negative I/O

DCDC_GND

DCDC ground

Table 56. LLWU Module Signal Descriptions

SoC Signal Name

Module Signal Name

Description

I/O

LLWU_P[15:0]

Wakeup inputs

8.3.4 Clock Modules

This section contains tables for Clock signal descriptions.

Table 57. Clock Module Signal Descriptions

SoC Signal Name

Module Signal Name

Description

I/O

EXTAL

26 MHz/32 MHz External

clock/Oscillator input

XTAL

26 MHz/32 MHz Oscillator

input

XTAL_OUT

26 MHz/32 MHz Clock output O

Table continues on the next page...

Pin Diagrams and Pin Assignments

MWPR1124ZVHT/MWPR1024IZVHT Data Sheet, Rev. 0, 04/2018

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