STMIPID02 datasheet(4/50 Pages) STMICROELECTRONICS

4 / 50 page

Application diagrams

Figure 2. MIPI CSI-2 application diagram

100/400 kHz I2C

Baseband

processor

application

multi-media

processor

‘backend IC’

DDR Clock (40MHz -> 400MHz)

Data1 (80Mbps -> 800Mbps)

Data2 (80Mbps -> 800Mbps)

Main camera

module

with

MIPI CSI-2

interface

MIPI CSI-2

2 x 800Mbps

6-b, 7-b, 8-b,

// pixel data

STMIPID02

DDR Clock (40MHz -> 400MHz)

Data (80Mbps -> 800Mbps)

2nd camera

module

with

MIPI CSI-2

interface

MIPI CSI-2

1 x 800Mbps

If Parallel Output

parallel

interface

10-b or 12-b

Figure 3. SMIA CCP2 application diagram

Clock / Strobe

Data (up to 650Mbps)

SMIA CCP2 Class 2

1 x 650Mbps

100/400 kHz I2C

Baseband

processor

application

multi-media

processor

‘backend IC’

Main camera

module

with

SMIA CCP2

interface

6-b, 7-b, 8-b,

// pixel data

STMIPID02

2nd camera

module

with

SMIA CCP2

interface

SMIA CCP2 Class 2

1 x 650Mbps

If Parallel Output

Parallel

Interface

Clock / Strobe

Data (up to 650Mbps)

10-b or 12-b

STMIPID02

Application diagrams

DS12803 - Rev 1

page 4/50

STMIPID02 Datasheet(PDF) 4 Page - STMicroelectronics

STMIPID02 Datasheet(HTML) 4 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

Datasheet Download

Link URL