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PI6C20800 Datasheet(PDF) 1 Page - Pericom Semiconductor Corporation

Part # PI6C20800
Description  1:8 Clock Driver for Intel PCI Express Chipsets
PDF  10 Pages
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Manufacturer  PERICOM [Pericom Semiconductor Corporation]
Direct Link  http://www.pericom.com
Logo PERICOM - Pericom Semiconductor Corporation

PI6C20800 Datasheet(HTML) 1 Page - Pericom Semiconductor Corporation

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1
PS8746C
02/01/06
Features
• Eight Pairs of Differential Clocks
• Low skew < 50ps
• Low Cycle-to-cycle jitter < 50ps
• Output Enable for all outputs
• Outputs Tristate control via SMBus
• Power Management Control
• Programmable PLL Bandwidth
• PLL or Fanout operation
• 3.3V Operation
• Packaging (Pb-Free & Green):
— 48-Pin SSOP (V)
— 48-Pin TSSOP (A)
PI6C20800
Description
PI6C20800 is a high-speed, low-noise differential clock buffer
designed to be a companion to PI6C410B. The device distributes
the differential SRC clock from PI6C410B to eight differential
pairs of clock outputs either with or without PLL. The input
SRC clock can be divided by 2 when SRC_DIV# is LOW. The
clock outputs are controlled by input selection of SRC_STOP#,
PWRDWN# and SMBus, SCLK and SDA. When input of either
SRC_STOP# or PWRDWN# is LOW, the output clocks are
Tristated. When PWRDWN# is LOW, the SDA and SCLK inputs
must be Tristated.
Block Diagram
1:8 Clock Driver for Intel
PCI Express Chipsets
Pin Configuration
OUT0
OUT0#
OUT0
OUT1#
OUT2
OUT2#
OUT3
OUT3#
DIV
Output
Control
SMBus
Controller
PLL
PLL_BW#
SRC
SRC#
PLL/BYPASS#
SRC_DIV#
SCLK
SDA
OE_INV
OE [0:7]
SRC_STOP#
PWRDWN#
OUT4
OUT4#
OUT5
OUT5#
OUT6
OUT6#
OUT7
OUT7#
LOCK
VDD_A
VSS_A
IREF
LOCK
OE_7
OE_4
OUT7
OUT7#
OE_INV
VDD
OUT6
OUT6#
OE_6
OE_5
OUT5
OUT5#
VSS
VDD
OUT4
OUT4#
PLL_BW#
SRC_STOP
PWRDWN#
VSS
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SRC_DIV#
VDD
VSS
SRC
SRC#
OE_0
OE_3
OUT0
OUT0#
VSS
VDD
OUT1
OUT1#
OE_1
OE_2
OUT2
OUT2#
VSS
VDD
OUT3
OUT3#
PLL/BYPASS#
SCLK
SDA


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