STM32F302X8 datasheet(25/139 Pages) STMICROELECTRONICS

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DS9896 Rev 8

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STM32F302x6 STM32F302x8

Functional overview

3.17

Inter-integrated circuit interfaces (I2C)

The devices feature three I2C bus interfaces which can operate in multimaster and slave

mode. Each I2C interface can support standard (up to 100 kHz), fast (up to 400 kHz) and

fast mode + (up to 1 MHz) modes.

All I2C interfaces support 7-bit and 10-bit addressing modes, multiple 7-bit slave addresses

(2 addresses, 1 with configurable mask). They also include programmable analog and

digital noise filters.

In addition, it provides hardware support for SMBUS 2.0 and PMBUS 1.1: ARP capability,

Host notify protocol, hardware CRC (PEC) generation/verification, timeouts verifications and

ALERT protocol management. It also has a clock domain independent from the CPU clock,

allowing the I2Cx (x=1,3) to wake up the MCU from Stop mode on address match.

The I2C interfaces can be served by the DMA controller.

Refer to Table 7 for the features available in I2C1, I2C2 and I2C3.

Table 6. Comparison of I2C analog and digital filters

Analog filter

Digital filter

Pulse width of

suppressed spikes

≥ 50 ns

Programmable length from 1 to 15

I2C peripheral clocks

Benefits

Available in Stop mode

1. Extra filtering capability vs.

standard requirements.

2. Stable length

Drawbacks

Variations depending on

temperature, voltage, process

Wakeup from Stop on address

match is not available when digital

filter is enabled.

Table 7. STM32F302x6/8 I2C implementation

I2C features(1)

1. X = supported.

I2C1

I2C2

I2C3

7-bit addressing mode

10-bit addressing mode

Standard mode (up to 100 kbit/s)

Fast mode (up to 400 kbit/s)

Fast Mode Plus with 20mA output drive I/Os (up to 1 Mbit/s)

Independent clock

SMBus

Wakeup from STOP

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