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STM32F302X8 Datasheet(PDF) 27 Page - STMicroelectronics |
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STM32F302X8 Datasheet(HTML) 27 Page - STMicroelectronics |
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27 / 139 page ![]() DS9896 Rev 8 27/139 STM32F302x6 STM32F302x8 Functional overview 51 mode, the master clock can be output to the external DAC/CODEC at 256 times the sampling frequency. Refer to Table 9 for the features available in SPI2 and SPI3. 3.20 Controller area network (CAN) The CAN is compliant with specifications 2.0A and B (active) with a bit rate up to 1 Mbit/s. It can receive and transmit standard frames with 11-bit identifiers as well as extended frames with 29-bit identifiers. It has three transmit mailboxes, two receive FIFOs with 3 stages and 14 scalable filter banks. 3.21 Universal serial bus (USB) The STM32F302x6 STM32F302x8 embeds a full-speed USB device peripheral compliant with the USB specification version 2.0. The USB interface implements a full-speed (12 Mbit/s) function interface with added support for USB 2.0 Link Power Management. It has software-configurable endpoint setting with packet memory up-to 1 Kbyte (the last 256 bytes are used for CAN peripheral if enabled) and suspend/resume support. It requires a precise 48 MHz clock which is generated from the internal main PLL (the clock source must use an HSE crystal oscillator). 3.22 Touch sensing controller (TSC) The STM32F302x6/8 devices provide a simple solution for adding capacitive sensing functionality to any application. These devices offer up to 18 capacitive sensing channels distributed over 6 analog I/O groups. Capacitive sensing technology is able to detect the presence of a finger near a sensor which is protected from direct touch by a dielectric (for example glass, plastic). The capacitive variation introduced by the finger (or any conductive object) is measured using a proven implementation based on a surface charge transfer acquisition principle. It consists of charging the sensor capacitance and then transferring a part of the accumulated charges into a sampling capacitor until the voltage across this capacitor has reached a specific threshold. To limit the CPU bandwidth usage this acquisition is directly managed by the hardware touch sensing controller and only requires few external components to operate. Table 9. STM32F302x6/8 SPI/I2S implementation SPI features(1) 1. X = supported. SPI2 SPI3 Hardware CRC calculation X X Rx/Tx FIFO X X NSS pulse mode X X I2S mode X X TI mode X X |
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