Rev 12.20.2021

9/10

www.leiditech.com

ASM6050

10. Application circuit

*1 CIN is a capacitor used to stabilize the input, using a capacitor greater than or equal to 0.1uF.

*2. CL uses capacitors with rms greater than or equal to 0.1uF. Most capacitors vary greatly with

temperature and DC bias voltage, such as the capacitance of Murata model GRM033R61C105ME15, which

drops at 5V DC bias 40%, 90% lower capacity value at 16V! To ensure loop stability, it is necessary

that the rms value of CL be greater than or equal to 0.1uF under any conditions, so CIN and CL both

use capacitors greater than or equal to 4.7uF, and the capacitors CIN and CL are in Place the PCB as

close to the chip pins as possible.

11. Application Notes

11.1 Basic work

Figure 9.1 shows a block diagram of the AM6050 series.

reference voltage ( Vref) is compared via an error amplifier. This error amplifier provides the output

transistor with the necessary gate voltage so that the output voltage is not affected by input voltage

or temperature changes and can be maintained.

Figuer 9.1

11.2 Output transistor

The LDO output transistors of the ASM6050 series use low on-state resistance P-channel MOSFET transistors.

In the construction of transistors, due to the presence of parasitic diodes between the VIN terminals - VOUT

terminals, when the potential of VOUT is higher than VIN, it is possible to cause reverse currents

The IC is destroyed. Therefore, be careful not to exceed VOUT by VIN+0.3 V.