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LT4239 Datasheet(PDF) 6 Page - Analog Devices

Part # LT4239
Description  High Current Hot Swap Controller with Current Monitor Output
PDF  24 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LT4239 Datasheet(HTML) 6 Page - Analog Devices

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LT4239
6
Rev. 0
For more information www.analog.com
PIN FUNCTIONS
OUT (Pin 1): MOSFET Gate Drive Return. Connect this
pin to the output side of the current sense resistor. The
gate fast pull-down current returns through this pin when
gates are discharged. GATE2 is pulled low quickly when
OUT falls below 3.7V after power good.
OUTK (Pin 2): Negative Current Sense Input. Connect to
the output terminal of the current sense resistor.
SENSE1, SENSE2 (Pins 4, 3): Positive Current Sense
Input. Connect to the input side of the current sense resis-
tor. The current limit circuit controls GATE1 to limit the
voltage between SENSE1 and OUTK to 50mV for 100µs
before fault latched-off during start-up. After GATE2
turns on, the circuit breaker will trip when the voltage
between SENSE2 and OUTK exceeds 10mV longer than
the overcurrent fault timer period. During an overload
condition, GATE2 is regulated to maintain 15mV of voltage
drop across SENSE2 and OUTK for 100µs before fault
latched-off.
GATE2 (Pin 5): Gate Drive for External N-Channel
MOSFETs. An internal 50µA current source starts charging
up the gate of the Bypass MOSFET when ∆VGATE1 is higher
than 10V and VIN – VOUT < 1V. GATE2 is limited to 12V
above OUT by internal clamps. A 10mA current source
keeps the MOSFET off when the part is in undervoltage
condition. When a short-circuit condition is detected,
GATE2 is pulled down to OUT by a 50mA current source.
This current increases to 600mA when a severe output
short is detected.
GATE1 (Pin 6): Gate Drive for External N-Channel MOSFET.
An internal 10µA current source charges up the gate of
the Start-up MOSFET. The inrush current can be limited
by the additional R-C network from GATE1 to GND by
controlling its slew rate. GATE1 is limited to 12V above
OUT by internal clamps. GATE1 turns off when power
good condition, ∆VGATE2 ≥ 10V and VIN – VOUT < 100mV,
are achieved. A 10mA current source keeps the MOSFET
off when the part is in undervoltage condition. When a
short-circuit condition is detected, GATE1 is pulled down
to OUT by a 10mA current source. This current increases
to 130mA when a severe output short is detected.
DRAIN (Pin 7): External MOSFET’s Drain Sense Input.
Connect a 100k resistor between this pin and the drain
of the external N-Channel MOSFET to monitor the differ-
ence between MOSFET’s drain and OUTK voltages. The
voltage sensed at this pin enables the GATE2 start-up
and power good delay after GATE1 is fully enhanced. If
the voltage between the MOSFET’s drain and OUTK rises
above 100mV after power good, a 20ms FET-Bad fault
timer will be activated.
VCC (Pin 8): Positive Supply Input. If supply voltage
spikes might exceed 25V, connect an RC filter at this pin.
This pin has an undervoltage lockout threshold of 3.6V
that will turn off all the MOSFETs.
STMR (Pin 9): Start-Up Timer. Connect a capacitor
between this pin and ground to set a 123ms/µF duration
for start-up. If either the MOSFET gate drive at GATE1
remains below 10V or the voltage between MOSFET’s
drain and OUTK is greater than 100mV at the end of the
start-up timer ramp-up, the start-up cycle is aborted.
GATE1 pulls low turning off the MOSFET and FLT pulls
low to indicate a start-up fault.
UV (Pin 10): Undervoltage Comparator Input. Connect to
an external resistive voltage divider from the input sup-
ply to monitor the supply voltage. This pin has a 25ms
debounce time on the rising edge before GATE1 start-up.
If the voltage at this pin falls below 1.182V, an undervolt-
age fault is detected and all the MOSFETs will be turned
off. Pulling the UV pin below 0.6V resets the fault latch
after a fault due to start-up failure, overcurrent, or FET
short. Connect to VCC if unused.
CBTMR (Pin 11): Overcurrent Fault Timer. Connect a
capacitor between this pin and ground to set a 123ms/
µF duration for circuit breaker timeout, after which an
overcurrent fault is generated and GATE2 is pulled low.
The duration of the cool down time is 185s/µF when
the  device is configured for auto-retry, resulting in a
0.06% duty cycle.



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