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SSM6515 Datasheet(PDF) 2 Page - Analog Devices |
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SSM6515 Datasheet(HTML) 2 Page - Analog Devices |
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2 / 40 page ![]() Data Sheet SSM6515 TABLE OF CONTENTS analog.com Rev. 0 | 2 of 40 Features................................................................ 1 Applications........................................................... 1 General Description...............................................1 Functional Block Diagram......................................3 Specifications........................................................ 4 Timing Specifications......................................... 6 Absolute Maximum Ratings...................................8 Thermal Resistance........................................... 8 Electrostatic Discharge (ESD) Ratings...............8 ESD Caution.......................................................8 Pin Configuration and Function Descriptions........ 9 Typical Performance Characteristics................... 10 Theory of Operation.............................................14 Overview.......................................................... 14 Power Supplies................................................ 14 ADDR Pin Setup and Control........................... 14 Standalone Operating Mode............................ 15 Power-Down Modes......................................... 15 Low Power Modes............................................15 Pulse Code Modulation (PCM) Digital Audio Serial Interface............................................... 15 Stereo (I2S/Left Justified) Operating Mode...... 16 TDM Operating Mode.......................................16 PDM Operating Mode.......................................16 Digital Gain and High-Pass Filter..................... 17 Output Limiter and Clipper............................... 17 Faults and Status............................................. 17 Pop and Click Suppression.............................. 18 EMI Control...................................................... 18 Output Modulation Description......................... 18 Output Load......................................................19 Power Supply Decoupling................................ 19 Layout...............................................................19 I2C Control........................................................19 Typical Application Circuit....................................22 Applications Information...................................... 23 Register Summary: I2C Register Map................. 24 Register Details: I2C Register Map......................25 Vendor ID Register...........................................25 Device ID Register........................................... 25 Revision Code Register....................................25 Master and Block Power Control Register....... 26 BCLK Rate Control Register............................ 26 PDM Control Register...................................... 27 DAC Sample Rate, Power Modes, Filtering Controls Register............................................28 DAC Mute and Volume Options Register......... 29 DAC High-Pass Filter Controls Register.......... 30 DAC Volume Control Register..........................31 DAC Clipper Control Register.......................... 31 Serial Audio Port Settings Register.................. 32 Serial Audio Port Slot Selection Register......... 33 Amplifier Controls Register...............................34 Audio Output Limiter Attack and Release Rate Controls Register................................... 35 Audio Output Limiter Threshold Control Register.......................................................... 35 Fault Control Register...................................... 37 Status Clear Register....................................... 38 Amplifier Status Register..................................38 Soft Reset Register.......................................... 39 Outline Dimensions............................................. 40 Ordering Guide.................................................40 Evaluation Boards............................................ 40 REVISION HISTORY 4/2022—Revision 0: Initial Version |
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