PIC16F616-ISLASHSTSQTP datasheet(31/172 Pages) APEX

31 / 172 page

Preliminary

DS41288A-page 29

PIC16F616/16HV616

FIGURE 4-2:

BLOCK DIAGRAM OF RA1

4.2.4.3

RA2/AN2/T0CKI/INT/C1OUT

Figure 4-3 shows the diagram for this pin. The RA2 pin

is configurable to function as one of the following:

• a general purpose I/O

• an analog input for the ADC

• the clock input for TMR0

• an external edge triggered interrupt

• a digital output from Comparator C1

FIGURE 4-3:

BLOCK DIAGRAM OF RA2

VDD

VSS

VDD

Weak

Data Bus

WPUA

RD PORTA

PORTA

TRISA

IOCA

Interrupt-on-

To Comparator

Analog(1)

Input Mode

RAPU

Analog(1)

Input Mode

Change

Note

Comparator mode and ANSEL determines Analog

Input mode.

To A/D Converter

I/O Pin

VDD

VSS

VDD

Weak

Analog(1)

Input Mode

Data Bus

WPUA

PORTA

TRISA

IOCA

To A/D Converter

C1OE

Enable

To INT

To Timer0

Analog(1)

Input Mode

RAPU

RD PORTA

Interrupt-on-

Change

Note

Analog Input mode is generated by ANSEL.

I/O Pin

PIC16F616-I/STSQTP Datasheet(PDF) 31 Page - Cirrus Logic

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