ALD1721/ALD1721G

Advanced Linear Devices

4 of 9

Design & Operating Notes:

1. The ALD1721/ALD1721G CMOS operational amplifier uses a 3 gain

stage architecture and an improved frequency compensation

scheme to achieve large voltage gain, high output driving capability,

and better frequency stability. The ALD1721/ALD1721G is internally

compensated for unity gain stability. This compensation produces a

clean single pole roll off in the gain characteristics while providing for

more than 70 degrees of phase margin at the unity gain frequency,

reducing or eliminating low levels of oscillation or ringing with many

types of loading conditions.

2. The ALD1721/ALD1721G has complementary p-channel and n-

channel input differential stages connected in parallel to accomplish

rail to rail input common mode voltage range. With different ranges

of common mode input voltage, one or both of the two differential

stages is active. The transition between the two input stages takes

place at about 1.5V below the positive supply voltage. Input offset

voltage trimming on the ALD1721/ALD1721G is made when the

input voltage is symmetrical to the supply voltages, this internal

transition switching does not affect a variety of applications such as

an inverting amplifier or non-inverting amplifier with a gain larger

than 2.5 (5V operation), where the common mode voltage does not

make excursions above this switching point. If the operational

amplifier is connected as a unity gain buffer, and full input and/or

output rail to rail range is used, then provision should be made to

allow for slight input offset voltage variations. Likewise the output

has push-pull(source-sink) output stages working in tandem to

provide full (see note 4) rail to rail output. In addition, the source and

sink currents are designed to provide symmetrical drives to the load.

3. The input bias and offset currents are essentially input protection

diode reverse bias leakage currents, and are typically less than

0.01pA at room temperature. This low input bias current assures

that the analog signal from the source will not be distorted by input

bias currents. Normally, this extremely high input impedance of

Ω would be limited by the source impedance which

would limit the node impedance. However, for applications where

source impedance is also very high, it may be necessary to limit

noise and hum pickup through proper ground shielding.

4. The output stage consists of class AB complementary output drivers,

capable of driving a low resistance load to either supply rail. The

output voltage swing is limited by the drain to source on-resistance

of the output transistors as determined by the bias circuitry, and the

value of the load resistor. When connected in the voltage follower

configuration, the oscillation resistant feature, combined with the rail

to rail input and output feature, makes an effective analog signal

buffer for medium to high source impedance sensors, transducers,

and other circuit networks.

5. The ALD1721/ALD1721G operational amplifier has been designed

to provide static discharge protection. Internally, the design has

been carefully implemented to minimize latch up. However, care

must be exercised when handling the device to avoid strong static

fields that may degrade a diode junction, causing increased input

leakage currents. The user is advised to power up the circuit before,

or simultaneously with any input voltages applied, and to limit input

voltages not to exceed 0.3V of the power supply voltage levels at all

times, including during power up and power down cycles.

6. The ALD1721/ALD1721G, with its micropower operation, offers

benefits in reduced power supply requirements, less noise coupling

and current spikes, less thermally induced drift, better overall reli-

ability due to lower self heating, and lower input bias current. It

requires practically no warm up time as the chip junction heats up to

0.1

°C or less above ambient temperature under most operating

conditions.

7. The ALD1721/ALD1721G has an internal design architecture that

provides robust high temperature operation. Contact factory for

custom screening versions.

TYPICAL PERFORMANCE CHARACTERISTICS

OPEN LOOP VOLTAGE GAIN AS A

FUNCTION OF LOAD RESISTANCE

10M

LOAD RESISTANCE (

Ω)

10K

100K

1M

1000

100

10

1

COMMON MODE INPUT VOLTAGE RANGE

AS A FUNCTION OF SUPPLY VOLTAGE

SUPPLY VOLTAGE (V)

±7

±6

±5

±4

±3

±2

±1

0

0

±1

±2

±3

±4

±5

±6

±7

SUPPLY CURRENT AS A FUNCTION

OF SUPPLY VOLTAGE

SUPPLY VOLTAGE (V)

500

400

200

300

0

100

0

±1

±2

±3

±4

±5

±6

+25

°C

+70

°C

+125

°C

INPUTS GROUNDED

OUTPUT UNLOADED

-25

°C

INPUT BIAS CURRENT AS A FUNCTION

OF AMBIENT TEMPERATURE

AMBIENT TEMPERATURE (

°C)

100

10

1.0

0.01

0.1

100

-25

0

75

125

50

25

-50

1000