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Data Sheet

ADN4620/ADN4621

PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS

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Rev. 0 | 11 of 24

Figure 4. ADN4620 Pin Configuration

Table 13. ADN4620 Pin Function Descriptions

Pin No.

Mnemonic

Description

1, 10

VDD1

1.8 V Power Supply for Side 1. Connect both pins externally and bypass to the adjacent GND1 pins with 0.1 μF capacitors.

2, 9

GND1

Ground, Side 1.

VIO1

3.3 V Input/Output Power Supply for Side 1. Bypass to the adjacent GND1 pin with a 0.1 μF capacitor.

DIN1+

Noninverted Differential Input 1.

DIN1−

Inverted Differential Input 1.

DIN2+

Noninverted Differential Input 2.

DIN2−

Inverted Differential Input 2.

REFRESH1

Active Low Enable for Side 1 Refresh Function. Short to the same PCB ground as GND1 for normal operation with refresh enabled, or short

to the power supply for VDD1 for lower power, lower jitter, and quieter operation with refresh disabled.

11, 20

VDD2

1.8 V Power Supply for Side 2. Connect both pins externally and bypass to the adjacent GND2 pins with 0.1 μF capacitors.

12, 19

GND2

Ground, Side 2.

NIC

Not internally connected.

DOUT2−

Inverted Differential Output 2.

DOUT2+

Noninverted Differential Output 2.

DOUT1−

Inverted Differential Output 1.

DOUT1+

Noninverted Differential Output 1.

REFRESH2

Active Low Enable for Side 1 Refresh Function. Short to the same PCB ground as GND2 for normal operation with refresh enabled, or short

to the power supply for VDD2 for lower power, lower jitter, and quieter operation with refresh disabled.

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