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AD8384ASVZ Datasheet(PDF) 14 Page - Analog Devices

Part # AD8384ASVZ
Description  10-Bit, 6-Channel Decimating LCD DecDriver-R with Level Shifters
PDF  24 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD8384ASVZ Datasheet(HTML) 14 Page - Analog Devices

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AD8384
Rev. 0 | Page 14 of 24
SERIAL INTERFACE
SVRH
SVRL
SDI
SCL
SEN
TSTM
12-BIT SHIFT REGISTER
SD0 SD1 SD2 SD3 SD4 SD5 SD6 SD7 SD8 SD9 SD10 SD11
SD(0:7)
8/
ENABLE
THERMAL
SWITCH
6/
VIDEO
DACs
DUAL SDAC
SELECT LOAD
CONTROL
VAO1, VAO2 = SVRL + SDICODE (SVRH–SVRL)/256
6/
AO2
AO1
VID(0:5)
6/
Figure 13. Serial Interface Block Diagram
SCL
SEN
SDI
D11 D10 D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
VAO1,
VAO2
SEN
SCL
SDI
VAO1,
VAO2
t20
t24
t25
t26
t21
t22
t23
D11
D0
D1
D10
Figure 14. Serial DAC Timing
Table 11. Serial DAC Timing
Parameter
Conditions
Min
Typ
Max
Unit
SEN to SCL Setup Time, t20
10
ns
SCL, High Level Pulse Width, t21
15
ns
SCL, Low Level Pulse Width, t22
10
ns
SDI Setup Time, t24
10
ns
SDI Hold Time, t25
10
ns
SCL to SEN Hold Time, t23
15
ns
VAO1, VAO2 Settling Time, t26
VFS = 5 V, to 0.5%, CL = 100 pF
1
2
µs
VFS = 5 V, to 0.5%, CL = 33 µF
10
15
ms



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