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CBTL08GP053EV Datasheet(PDF) 13 Page - NXP Semiconductors

Part # CBTL08GP053EV
Description  USB Type-C High performance Crossbar Switch IC
PDF  38 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

CBTL08GP053EV Datasheet(HTML) 13 Page - NXP Semiconductors

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CBTL08GP053
All information provided in this document is subject to legal disclaimers.
© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
Rev. 2 — 1 August 2016
13 of 38
NXP Semiconductors
CBTL08GP053
USB Type-C High performance Crossbar Switch IC
7.2.1
SYS_CTRL register
7.2.2
OP1_CTRL register
[1]
The only valid bit values are b'XXXXX001, b'XXXXX010 and b'XXXXX100. Any other bit combination of LS 3 bits will result in Hi-Z at the
outputs OP1+/-.
7.2.3 OP2_CTRL register
[1]
The only valid bit values are b'XXXXX001, b'XXXXX010 and b'XXXXX100. Any other bit combination of LS 3 bits will result in Hi-Z at the
outputs OP2+/-.
Table 7.
SYS_CTRL register (address 0x01) bit description
Default: b’00000000
Bit
Symbol
Access
Value
Description
7
SWITCH_EN R/W
1
CBTL08GP053 is in functional mode. The host shall write a '1' into
this bit to put the device into functional mode.
0
CBTL08GP053 is in Shutdown mode. After POR, the device enters
and remains in shutdown mode.
To put the device into shutdown mode, this host shall write a '0' into
this register bit.
6:0
RESERVED
R/W
XXXXXXX
Reserved bit fields. Reads will be zeros and writes do not have any
effect.
Table 8.
OP1_CTRL register (address 0x02) bit description
Default: b’00000000
Bit
Symbol
Access
Value
Description
7:3
RESERVED
R/W
XXXXX
Reserved bit fields. Reads will be zeros and writes do not have any
effect.
2
IP3
R/W
0
Switch inputs IP3+/- are not selected
1
Switch inputs IP3+/- are selected for connection to OP1+/-
1
IP2
R/W
0
Switch inputs IP2+/- are not selected
1
Switch inputs IP2+/- are selected for connection to OP1+/-
0
IP1
R/W
0
Switch inputs IP1+/- are not selected
1
Switch inputs IP1+/- are selected for connection to OP1+/-
Table 9.
OP2_CTRL register (address 0x03) bit description
Default: b’00000000
Bit
Symbol
Access
Value
Description
7:3
RESERVED
R/W
XX
Reserved bit fields. Reads will be zeros and writes do not have any
effect.
2
IP3
R/W
0
Switch inputs IP3+/- are not selected
1
Switch inputs IP3+/- are selected for connection to OP2+/-
1
IP2
R/W
0
Switch inputs IP2+/- are not selected
1
Switch inputs IP2+/- are selected for connection to OP2+/-
0
IP1
R/W
0
Switch inputs IP1+/- are not selected
1
Switch inputs IP1+/- are selected for connection to OP2+/-



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