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25CSM04T-I/CS0668 Datasheet(PDF) 26 Page - Microchip Technology |
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25CSM04T-I/CS0668 Datasheet(HTML) 26 Page - Microchip Technology |
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26 / 55 page ![]() 25CSM04 DS20005817D-page 26 2019-2022 Microchip Technology Inc. and its subsidiares 7.0 READ SEQUENCES 7.1 Reading from the EEPROM Reading the EEPROM contents can be done whenever the device is not in an internal write cycle, as indicated by the Ready/Busy bit of the STATUS register. To read the EEPROM, first the CS line is pulled low to select the device and the READ (03h) instruction is transmitted via the SI line followed by the 24-bit address to be read. Address bits A23 through A19 are “don’t care” bits because they do not fall within the addressable memory range. Upon completion of the 24-bit address, any data on the SI line will be ignored. The data (D7–D0) at the specified address is then shifted out onto the SO line. If only one byte is to be read, the CS line should be driven high after the data are clocked out. The read sequence can be continued since the byte address is automatically incremented and data will continue to be shifted out. When the highest address is reached, the address counter will “rollover” to the lowest address (000000h) allowing the entire memory to be read in one continuous read cycle regardless of the starting address. The read sequence can be terminated at any point of the sequence (drive CS high). FIGURE 7-1: READ EEPROM (READ) SEQUENCE CS SCK 1 0 2 34 567 8 910 11 12 40 41 39 38 37 36 35 34 33 32 31 30 29 00 000 0 1 1 AA A READ Opcode (03h) Address Bits A23-A0 XX XX X A SI D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 Data Byte 1 SO MSb MSb MSb MSb High-Impedance |
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