HT47C10L datasheet(9/38 Pages) HOLTEK

9 / 38 page

HT47C10L

Rev. 1.90

November 30, 2005

Bit No.

Label

Function

C is set if an operation results in a carry during an addition operation or if a borrow does not

take place during a subtraction operation; otherwise C is cleared. C is also affected by a rotate

through carry instruction.

1AC

AC is set if an operation results in a carry out of the low nibbles in addition or no borrow from

the high nibble into the low nibble in subtraction; otherwise AC is cleared.

Z is set if the result of an arithmetic or logical operation is zero; otherwise Z is cleared.

3OV

OV is set if an operation results in a carry into the highest-order bit but not a carry out of the

highest-order bit, or vice versa; otherwise OV is cleared.

PDF

PDF is cleared by either a system power-up or executing the

²CLR WDT² instruction. PDF is

set by executing the

²HALT² instruction.

5TO

TO is cleared by a system power-up or executing the

²CLR WDT² or² HALT² instruction. TO is

set by a WDT time-out.

Unused bit, read as

²0²

Unused bit, read as

²0²

STATUS (0AH) Register

Arithmetic and Logic Unit

- ALU

This circuit performs 8-bit arithmetic and logic operation.

The ALU provides the following functions:

· Arithmetic operations (ADD, ADC, SUB, SBC, DAA)

· Logic operations (AND, OR, XOR, CPL)

· Rotation (RL, RR, RLC, RRC)

· Increment and Decrement (INC, DEC)

· Branch decision (SZ, SNZ, SIZ, SDZ ....)

The ALU not only saves the results of a data operation but

can change the status register.

Status Register

- STATUS

This 8-bit register (0AH) contains the zero flag (Z), carry

flag (C), auxiliary carry flag (AC), overflow flag (OV),

power down flag (PDF) and watchdog time-out flag

(TO). It also records the status information and controls

the operation sequence.

With the exception of the TO and PDF flags, bits in

the status register can be altered by instructions like

most other registers. Any data written into the status

tion it should be noted that operations related to the

status register may give different results from those

intended. The TO and PDF flags can only be

changed by the watchdog timer overflow, system

power-up, clearing the watchdog timer and execut-

ing the HALT instruction.

The Z, OV, AC and C flags generally reflect the status of

the latest operations.

In addition, on entering the interrupt sequence or exe-

cuting the subroutine call, the status register will not be

automatically pushed onto the stack. If the contents of

status are important and if the subroutine can corrupt

the status register, precautions must be taken to save it

properly.

Interrupts

The HT47C10L provides an internal timer/event counter

interrupt and an internal time base interrupt. The inter-

rupt control register (INTC;0BH) contains the interrupt

control bits to set the enable/disable and interrupt re-

quest flags.

Once an interrupt subroutine is serviced, all other inter-

rupts will be blocked (by clearing the EMI bit). This

scheme may prevent any further interrupt nesting. Other

interrupt requests may happen during this interval, but

only the interrupt request flag is recorded. If a certain in-

terrupt needs servicing within the service routine, the

programmer may set the EMI bit and the corresponding

bit of INTC allow interrupt nesting. If the stack is full, the in-

terrupt request will not be acknowledged, even if the re-

lated interrupt is enabled, until the SP is decremented. If

immediate service is desired, the stack must be prevented

from becoming full.

As an interrupt is serviced, a control transfer occurs by

pushing the program counter onto the stack, followed by

a branch to a subroutine at specified locations in the pro-

gram memory. Only the program counter is pushed onto

the stack. If the contents of the register and status regis-

ter (STATUS) is altered by the interrupt service program

which corrupts the desired control sequence, the con-

tents must be saved first.

The internal timer/event counter interrupt is initialized by

setting the timer/event counter interrupt request flag

(TF; bit 4 of INTC), caused by a timer A or timer B over-

flow. When the interrupt is enabled, and the stack is not

full and the TF bit is set, a subroutine call to location 04H

will occur. The related interrupt request flag (TF) will be

reset and the EMI bit cleared to disable further inter-

rupts.

HT47C10L Datasheet(PDF) 9 Page - Holtek Semiconductor Inc

HT47C10L Datasheet(HTML) 9 Page - Holtek Semiconductor Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38

Datasheet Download

Link URL