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TSC87C52-12CKB Datasheet(PDF) 13 Page - TEMIC Semiconductors |
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TSC87C52-12CKB Datasheet(HTML) 13 Page - TEMIC Semiconductors |
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13 / 24 page ![]() TSC87C52 13 MATRA MHS Rev. C – 10 Sept 1997 Preliminary Control signals Data In ALE/PROG A0–A12 Programming Cycle 1 2 3 5 4 10us 100us D0–D7 EA/VPP Data Out Read/Verify Cycle 12.75V 5V 0V Figure 9 Programming and verification signal’s waveform Signature bytes The TSC87C52 has four signature bytes in location 30h, 31h, 60h and 61h. To read these bytes follow the procedure for EPROM verify but activate the control lines provided in Table 6 for Read Signature Bytes. Table 7 shows the content of the signature byte for the TSC87C52. Table 7 Signature bytes content Location Contents Comment 30h 58h Customer selection byte: TEMIC 31h 58h Family selection byte: C51 60h ADh TSC87C52 61h XXh Product revision number EPROM Erasure (Windowed Packages Only) Erasing the EPROM erases the code array and also the encryption array returning the parts to full functionality. Erasure leaves all the EPROM cells in a 1’s state. Erasure Characteristics The recommended erasure procedure is exposure to ultraviolet light (at 2537 Å) to an integrated dose at least 15 W–sec/cm2. Exposing the EPROM to an ultraviolet lamp of 12,000 µW/cm2 rating for 30 minutes, at a distance of about 25 mm, should be sufficient. Erasure of the EPROM begins to occur when the chip is exposed to light with wavelength shorter than approximately 4,000 Å. Since sunlight and fluorescent lighting have wavelengths in this range, exposure to these light sources over an extended time (about 1 week in sunlight, or 3 years in room–level fluorescent lighting) could cause inadvertent erasure. If an application subjects the device to this type of exposure, it is suggested that an opaque label be placed over the window. |
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