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VT6508 Datasheet(PDF) 13 Page - List of Unclassifed Manufacturers

Part # VT6508
Description  8 RMII PORTS OF 10/100BASE-T/TX ETHERNET SWITCH CONTROLLER
PDF  48 Pages
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Manufacturer  ETC1 [List of Unclassifed Manufacturers]
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VT6508 Datasheet(HTML) 13 Page - List of Unclassifed Manufacturers

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VIA Technologies, Inc.
Preliminary VT6508 Datasheet
-13-
SD[7:6]
Number of Tries of Excessive Collisions Before Dropping:
RETRY_EXCE_COLL [1:0] == 2’ b11 => 3 tries (default)
RETRY_EXCE_COLL [1:0] == 2’ b10 => 2 tries
RETRY_EXCE_COLL [1:0] == 2’ b01 => retry forever
RETRY_EXCE_COLL [1:0] == 2’ b00 => 1 try
Internally, retry_no = RETRY_EXCE_COLL, or infinite if it is zero.
By default, after 3 tries (i.e. 3 turns of (excessive) 16 collisions), the outgoing packet will
be dropped.
SD[15:8]
(reserved with default value “pull-high”)
SD[17,16]
Trunking Mode:
SD16 == 1, port (0,1) no trunking (default)
0, port (0,1) in trunking mode,
SD17 == 1, port (6,7) no trunking (default)
0, port (6,7) in trunking mode.
To simplify layout, trunk group (6,7) can connect with neighboring (right-side)
VT6508’ s trunk group (0,1) in on-board manner.
Note that on-board trunk ports do not need auto-polling and they must be full-duplex &
100Mbps ports & forced flow control enable mode.
SD[18]
Enable Backpressure:
BACKPRESSURE_EN [0] == 1’ b1 => enabled (default)
BACKPRESSURE_EN [1] == 1’ b0 => disabled
Note that if it is disabled, all TMAC of half-duplex ports will ignore the flow control
XON/XOFF signals from Queue Control.
SD[20:19]
Enable RMII Port Flow Control:
RMII_PORT_FC_EN[1:0] == 2’ b11 => for RMII ports, set self flow control ability
register bit and detect party’ s flow control ability (default)
RMII_PORT_FC_EN[1:0] == 2’ b10 => for RMII ports, disable self flow control ability
register bit and assume (ignore auto-polling) party has no flow control capability
RMII_PORT_FC_EN[1:0] == 2’ b01 => for RMII ports, enable self flow control ability
register bit and assume (ignore auto-polling) party has flow control capability
RMII_PORT_FC_EN[1:0] == 2’ b00 => same as 2’ b11.
While enabled (RMII_PORT_FC_EN[1:0] == 2’ b11 or 2’ b00), set self each PHY
device’ s flow control ability register bit PHY_ANAR_4.10 as 1, and auto polling
PHY_ANLPAR_5.10 to check whether the party has the flow control capability.
While forced disabling (RMII_PORT_FC_EN[1:0] == 2’ b10), set self PHY devices’
flow control ability register bit PHY_ANAR_4.10 as 0 (no such capability), and does not
need auto polling PHY_ANLPAR_5.10.
While forced disabling (RMII_PORT_FC_EN[1:0] == 2’ b01), set self PHY devices’
flow control ability register bit PHY_ANAR_4.10 as 1 (with flow control capability), and
does not need auto polling PHY_ANLPAR_5.10.
For forced disabling, turn off flow control enable bits of all RMII ports.
For (forced) enabling, turn on flow control enable bits of all RMII ports.
SD[23:21]
LED Serial-Out Mask for Groups 0,1,2,3 [3:0]:
LED_MASK[0] == 1’ b1 => enable group 0 data out (default)
LED_MASK[1] == 1’ b1 => enable group 1 data out (default)
LED_MASK[2] == 1’ b1 => enable group 2 data out (default)
LED Groups 3,4,5 serial out is always enabled. The time period of LED sequence is
50ms.



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