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ACEX1K Datasheet(PDF) 29 Page - Altera Corporation

Part # ACEX1K
Description  Programmable Logic Device Family
PDF  86 Pages
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Manufacturer  ALTERA [Altera Corporation]
Direct Link  http://www.altera.com
Logo ALTERA - Altera Corporation

ACEX1K Datasheet(HTML) 29 Page - Altera Corporation

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Altera Corporation
29
ACEX 1K Programmable Logic Device Family Data Sheet
13
Figure 14. ACEX 1K Interconnect Resources
I/O Element
An IOE contains a bidirectional I/O buffer and a register that can be used
either as an input register for external data that requires a fast setup time
or as an output register for data that requires fast clock-to-output
performance. In some cases, using an LE register for an input register will
result in a faster setup time than using an IOE register. IOEs can be used
as input, output, or bidirectional pins. The compiler uses the
programmable inversion option to invert signals from the row and
column interconnect automatically where appropriate. For bidirectional
registered I/O implementation, the output register should be in the IOE
and the data input and output enable registers should be LE registers
placed adjacent to the bidirectional pin. Figure 15 shows the bidirectional
I/O registers.
I/O Element (IOE)
Row
Interconnect
IOE
IOE
IOE
IOE
Column
Interconnect
LAB
B1
See Figure 17
for details.
See Figure 16
for details.
LAB
A3
LAB
B3
LAB
A1
LAB
A2
LAB
B2
IOE
IOE
Cascade &
To LAB B4
To LAB A4
To LAB B5
To LAB A5
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
Carry Chains



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